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Dive into the research topics where Philippos Tsalides is active.

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Featured researches published by Philippos Tsalides.


Pattern Recognition | 2002

A new approach to morphological color image processing

Gerasimos Louverdis; Maria I. Vardavoulia; Ioannis Andreadis; Philippos Tsalides

This paper presents a new approach to the generalization of the concepts of grayscale morphology to color images. A new vector ordering scheme is proposed, infimum and supremum operators are defined, and the fundamental vector morphological operations are extracted. The basic properties of the presented vector morphology are described and its similarities to grayscale morphological operators are pointed out. The main advantages of the proposed methodology are that is vector preserving and provides improved results in many morphological applications. Furthermore, experimental results demonstrate the applicability of the proposed technique in a number of image processing and analysis problems, such as noise removal, edge detection and skeleton extraction.


international conference on robotics and automation | 1997

Collision-free path planning for a diamond-shaped robot using two-dimensional cellular automata

Panagiotis Tzionas; Adonios Thanailakis; Philippos Tsalides

This paper presents a new parallel algorithm for collision-free path planning of a diamond-shaped robot among arbitrarily shaped obstacles, which are represented as a discrete image, and its implementation in VLSI. The proposed algorithm is based on a retraction of free space onto the Voronoi diagram, which is constructed through the time evolution of cellular automata, after an initial phase during which the boundaries of obstacles are identified and coded with respect to their orientation. The proposed algorithm is both space and time efficient, since it does not require the modeling of objects or distance and intersection calculations. Additionally, the proposed twodimensional multistate cellular automaton architecture achieves high frequency of operation and it is particularly suited for VLSI implementation due to its inherent parallelism, structural locality, regularity, and modularity.


Pattern Recognition Letters | 2001

A new vector median filter for colour image processing

Maria I. Vardavoulia; Ioannis Andreadis; Philippos Tsalides

Abstract In this paper a new vector median filter suitable for colour image processing is presented. It is based on a new ordering of vectors in the HSV colour space. Illustrative and comparative examples of degraded colour image restoration are also provided.


Pattern Recognition | 1996

A cellular automaton for the determination of the mean velocity of moving objects and its VLSI implementation

Ioannis Karafyllidis; Ioannis Andreadis; Panagiotis Tzionas; Philippos Tsalides; Adonios Thanailakis

Abstract A new algorithm for the determination of the mean velocity of a moving object, using the properties of Cellular Automata, is presented in this paper. The mean velocity is calculated along the centra axis perpendicular to the lens of the vision system. The motion of the object is restricted to translation (angular velocity is zero) and to one moving object in the scene. Experimental results for the determination of the mean velocity and its computational error are also presented. The algorithm presented in this paper does not require the calculation or the extraction of image features, such as area and shape, line segments, characteristic points, corners, etc. The design and VLSI implementation of a Cellular Automaton architecture is also presented for the efficient realisation of the algorithm.


Journal of Intelligent and Robotic Systems | 1996

A new hardware module for automated visual inspection based on a cellular automaton architecture

Ioannis Andreadis; Ioannis Karafyllidis; Panagiotis Tzionas; Adonios Thanailakis; Philippos Tsalides

This paper presents the design and VLSI implementation of a new automated visual inspection system based on a cellular automaton architecture, suitable for circular object inspection. Cellular Automata (CA) transform the area of the object of interest into a number of evolution steps in the CA space. The proposed technique does not require the extraction of image features, such as boundary length and total area, which are computationally expensive in other methods. The die size dimensions of the chip, for a 16×16 pixel image, are 3.73 mm×3.09 mm=11.52 mm2 and its maximum frequency of operation is 25 MHz. Experimental results using computer-generated images, as well as real images obtained and processed through a commercial vision system, showing the suitability of the proposed hardware module for detecting circular objects, are also presented. Targeted applications include inspection tasks (accept/reject operations) of circular objects, such as tablets in the pharmaceutical industry, and detection of uncoated areas, foreign objects and level of bake in the confectionery and food industry.


IEEE Sensors Journal | 2002

Optical-fiber finger photo-plethysmograph using digital techniques

John N. Lygouras; Philippos Tsalides

This paper presents digital techniques to design an optical-fiber photo-plethysmograph. This noninvasive method is based on the measurement of the intensity of an infrared-light beam, which penetrates the index finger. Sinusoidal modulation of the light-beam by driving an infrared LED is proposed. The method of direct digital synthesis is used to produce a very stable sinusoidal waveform. Optical fibers are used to transfer the light to and from the sampling point. Synchronous amplitude demodulation is used here instead of using analog low-pass filters, so the information concerning the amplitude is almost noiseless. Off-line frequency analysis of the peripheral volume pulse-wave signal is performed. The power content in the harmonics of this pulse wave may be a useful measure of aging and vascular disease.


Pattern Recognition | 1997

REALIZATION OF RANK ORDER FILTERS BASED ON MAJORITY GATE

Antonios Gasteratos; Ioannis Andreadis; Philippos Tsalides

A new technique for the implementation of a single hardware structure capable of computing any rank order filter is presented in this paper. The proposed technique, which is based on the majority gate, achieves faster extraction of setting flag signals and, therefore, shorter processing times are attained. A pipelined systolic array, suitable for performing rank order filtering, is also presented. Applications of rank order filters include digital image processing, speech processing and coding and digital TV applications.


Microprocessors and Microsystems | 1998

THETIS: an underwater remotely operated vehicle for water pollution measurements

John N. Lygouras; Konstantinos A. Lalakos; Philippos Tsalides

Abstract This paper describes the unmanned underwater remotely operated vehicle (UROV) THETIS, an easy to operate vehicle suitable for exploiting water environments. The subsystems composing our system, as compared to conventional ROVs, are discussed and evaluated. The vehicles primary use, at the present stage of development, is to perform underwater observations as well as temperature, pH/dissolved O 2 and suspended sediment measurements for underwater pollution studies. Using simple components, the ROVs high reliability and efficient performance offer a versatile and cost-effective work system.


Microprocessors and Microsystems | 1997

Comparison between cellular automata and linear feedback shift registers based pseudo-random number generators

I. Kokolakis; Ioannis Andreadis; Philippos Tsalides

Abstract A detailed comparison between pseudo-random number generators (PRNGs) based on cellular automata (CA) and linear feedback shift registers (LFSRs) is presented in this paper. Various statistical tests have been applied in order to reveal the advantages and disadvantages of both approaches. Both LFSRs and hybrid additive cellular automata (HACA) produce satisfactory PRNGs. HACA operate at higher speeds than LFSRs with the same characteristic polynomials. Regarding the silicon area, direct comparisons between the two approaches cannot be made since it depends on the PRNG length. However, the inherent modularity of HACA reduces the silicon area occupied by them and, when long feedback paths are used, the silicon area occupied by LFSRs increases.


Microprocessors and Microsystems | 1996

An ASIC for fast grey-scale dilation

Ioannis Andreadis; Antonios Gasteratos; Philippos Tsalides

Abstract The design and VLSI implementation of a new ASIC which performs the operation of grey-scale dilation using both image and structuring element threshold decomposition is presented in this paper. The minimum rate of external operations of this ASIC is 30 MPix/sec and it can handle 3 × 3 pixel images and structuring elements of up to 4-bit resolution. The high speed of operation is achieved using the pipelining technique. The ASIC is implemented using a DLM, 1.0 /gmm, N-well, CMOS process provided by the European Silicon Structures (ES2), and it occupies a silicon area of 5.48 × 5.77 mm = 31.61 mm 2 . It is intended to be used in machine vision applications, where the need for short processing times is crucial (e.g. robotics and military systems).

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Ioannis Andreadis

Democritus University of Thrace

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Adonios Thanailakis

Democritus University of Thrace

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Panagiotis Tzionas

Democritus University of Thrace

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Antonios Gasteratos

Democritus University of Thrace

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John N. Lygouras

Democritus University of Thrace

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Maria I. Vardavoulia

Democritus University of Thrace

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E. D. Adamides

Democritus University of Thrace

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I. Kokolakis

Democritus University of Thrace

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Ioannis Karafyllidis

Democritus University of Thrace

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A. Thanailakis

Democritus University of Thrace

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