Pietro Andreani

On the use of MOS varactors in RF VCOs

This paper presents two 1.8 GHz CMOS voltage-controlled oscillators (VCOs), tuned by an inversion-mode MOS varactor and an accumulation-mode MOS varactor, respectively. Both VCOs show a lower power consumption and a lower phase noise than a reference VCO tuned by a more commonly used diode varactor. The best overall performance is displayed by the accumulation-mode MOS varactor VCO. The VCOs were implemented in a standard 0.6 /spl mu/m CMOS process.

Analysis and design of a 1.8-GHz CMOS LC quadrature VCO

This paper presents a quadrature voltage-controlled oscillator (QVCO) based on the coupling of two LC-tank VCOs. A simplified theoretical analysis for the oscillation frequency and phase noise displayed by the QVCO in the 1/f/sup 3/ region is developed, and good agreement is found between theory and simulation results. A prototype for the QVCO was implemented in a 0.35-/spl mu/m CMOS process with three standard metal layers. The QVCO could be tuned between 1.64 and 1.97 GHz, and showed a phase noise of -140 dBc/Hz or less across the tuning range at a 3-MHz offset frequency from the carrier, for a current consumption of 25 mA from a 2-V power supply. The equivalent phase error between I and Q signals was at most 0.25/spl deg/.

Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise

A harmonic oscillator topology displaying an improved phase noise performance is introduced in this paper. Exploiting the advantages yielded by operating the core transistors in class-C, a theoretical 3.9 dB phase noise improvement compared to the standard differential-pair LC-tank oscillator is achieved for the same current consumption. Further benefits derive from the natural rejection of the tail bias current noise, and from the absence of parasitic nodes sensitive to stray capacitances. Closed-form phase-noise equations obtained from a rigorous time-variant circuit analysis are presented, as well as a time-variant study of the stability of the oscillation amplitude, resulting in simple guidelines for a reliable design. Furthermore, the analysis of phase noise is extended to encompass a general harmonic oscillator, showing that all phase noise relations previously obtained for specific LC oscillator topologies are special cases of a very general and remarkably simple result.

A study of phase noise in colpitts and LC-tank CMOS oscillators

This paper presents a study of phase noise in CMOS Colpitts and LC-tank oscillators. Closed-form symbolic formulas for the 1/f/sup 2/ phase-noise region are derived for both the Colpitts oscillator (either single-ended or differential) and the LC-tank oscillator, yielding highly accurate results under very general assumptions. A comparison between the differential Colpitts and the LC-tank oscillator is also carried out, which shows that the latter is capable of a 2-dB lower phase-noise figure-of-merit (FoM) when simplified oscillator designs and ideal MOS models are adopted. Several prototypes of both Colpitts and LC-tank oscillators have been implemented in a 0.35-/spl mu/m CMOS process. The best performance of the LC-tank oscillators shows a phase noise of -142dBc/Hz at 3-MHz offset frequency from a 2.9-GHz carrier with a 16-mW power consumption, resulting in an excellent FoM of /spl sim/189 dBc/Hz. For the same oscillation frequency, the FoM displayed by the differential Colpitts oscillators is /spl sim/5 dB lower.

On the phase-noise and phase-error performances of multiphase LC CMOS VCOs

This paper presents an analysis of phase noise in multiphase LC oscillators, and measurement results for several CMOS quadrature-voltage-controlled-oscillators (QVCOs) working in the 2-GHz frequency range. The phase noise data for a so-called BS-QVCO (-140 dBc/Hz or less at 3 MHz frequency offset from the carrier, for a power consumption of 20.8 mW and a figure-of-merit of 184 dBc/Hz) show that phase noise performances are close to the previously derived limits. A systematic cause of departure from ideal quadrature between QVCO signals is also analyzed and measured experimentally, and a compact LC-tank layout that removes this source of phase error is proposed. A TS-QVCO designed with this technique shows a phase-noise figure-of-merit improvement of 4 dB, compared to a previous implementation. The measured equivalent phase error for all QVCOs is between 0.6/spl deg/ and 1/spl deg/.

Tail current noise suppression in RF CMOS VCOs

This paper presents the experimental results of two different techniques, inductive degeneration and capacitive filtering, for reducing the phase noise in tail-biased RF CMOS voltage-controlled oscillators (VCOs). Both techniques prevent the low-frequency tail current noise from being converted into phase noise. The techniques are applied to two distinct VCO designs, showing that the largest phase noise reduction (up to 6-7 dB at 3-MHz offset frequency from the carrier) is achieved via inductive degeneration. Capacitive filtering, however, also substantially reduces the phase noise at high offset frequencies and may therefore become a valid alternative to inductive degeneration, as discrete capacitors are of more common use than discrete inductors.

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This paper presents a rigorous phase noise analysis in the 1/f2 region for the differential CMOS LC-tank oscillator with both nMOS and pMOS switch pairs. A compact, closed-form phase noise equation is obtained, accounting for the noise contributions from both tank losses and transistors currents, which allows a robust comparison between LC oscillators built with either one or two switch pairs. The fabricated oscillator prototype is tunable between 2.15 and 2.35 GHz, and shows a phase noise of -144 dBc/Hz at 3 MHz offset from the 2.3 GHz carrier for a 4 mA bias current. The phase noise figure-of-merit is practically constant across the tuning range, with a minimum of 191.5 dBc/Hz. A reference single-switch-pair oscillator has been implemented and tested as well, and the difference between the phase noise levels displayed by the two oscillators is very nearly the one expected from theory

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A 1.8 GHz quadrature VCO in standard 0.35 /spl mu/m CMOS with three metal layers shows -140 dBc/Hz or less phase noise across an 18% tuning range, while drawing 25 mA from a 2 V power supply. The quadrature phase error between the VCO outputs is at most 0.25/spl deg/.

Phase Noise Performance of CMOS Differential-Pair LC -Tank Oscillators

A VCO is implemented in an RF 90 nm CMOS process and covers the frequency range 2.55-4.08 GHz. Drawing 19 mA from 1.2 V, the phase noise at 20 MHz frequency offset from a 3.7 GHz carrier is -156 dBc/Hz, meeting the phase noise requirement for GSM/EDGE and SAW-less WCDMA transmitter after frequency division by 2 or by 4. A second version of the VCO covers an additional 4.90-5.75 GHz range, at the expense of a higher phase noise in the added band. In this way, all currently operational WCDMA/EDGE bands can be synthesized by a single VCO working at the double or quadruple of the desired band.

A low-phase-noise low-phase-error 1.8 GHz quadrature CMOS VCO

This paper presents two class-C CMOS VCOs with a dynamic bias of the core transistors, which maximizes the oscillation amplitude without compromising the robustness of the oscillation start-up, thereby breaking the most severe trade-off in the original class-C topology. An analysis of several different oscillators, starting with the common class-B architecture and arriving to the proposed class-C design, shows that the latter exhibits a figure-of-merit (FoM) that is closest to the ideal FoM allowed by the integration technology. The class-C VCOs have been implemented in a 90 nm CMOS process with a thick top metal layer. They are tunable between 3.4 GHz and 4.5 GHz, covering a tuning range of 28%. Drawing 5.5 mA from 1.2 V, the phase noise is lower than -152 dBc/Hz at a 20 MHz offset from a 4 GHz carrier. The resulting FoM is 191 dBc/Hz, and varies less than 1 dB across the tuning range.