Po-Hsiang Liao

Matrix and quantum confinement effects on optical and thermal properties of Ge quantum dots

The influence of SiO_2 and Si_3N_4 dielectric matrices on the structural, phonon, luminescence and thermal properties of Ge quantum dots (QDs) has been experimentally investigated. Compared with the case of QDs in SiO_2 layers, Si_3N_4 matrix imposes large interfacial surface energy on QDs and enhances their Ostwald ripening rate, appearing to be conducive for an improvement in crystallinity and a morphology change to a more perfectly spherical shape of Ge QDs. Quantum confinement induced electronic structure modulation for Ge QDs is observed to be strongly influenced not only by the QD size but also by the embedded matrix. Both matrix and surface effects offer additional mechanisms to QD itself for controlling the optical and thermal properties of the QDs.

SiGe Quantum Dots Over Si Pillars for Visible to Near-Infrared Broadband Photodetection

We demonstrate a successful selective growth of Si0.3Ge0.7 quantum dots (QDs) over array of p+-Si nanopillars using a low-pressure chemical vapor deposition technique, and hereafter realized high-performance QD broadband photodiodes for visible to near-infrared photodetection based on heterostructures of indium tin oxide/Si0.3Ge0.7 QD/Si pillar. Thanks to effective hole confinement and thus a built-in electric field within the SiGe QD, high ratios of photocurrent to dark current of ~2200, 100, and 30, respectively, were measured on our SiGe QDs-based photodiodes under illumination of 9 mW/cm2 at wavelength of 500-800, 1300, and 1500 nm. The QD photodiode exhibits a very low dark current density of 3.2 × 10-8 A/cm2 and a tunable power-dependent linearity by applied voltage through the competition of electron drift and carrier recombination processes.

Gate-Stack Engineering for Self-Organized Ge-dot/SiO2/SiGe-Shell MOS Capacitors

We report the first-of-its-kind, self-organized gate-stack heterostructure of Ge-dot/SiO2/SiGe-shell on Si fabricated in a single step through the selective oxidation of a SiGe nano-patterned pillar over a Si3N4 buffer layer on a Si substrate. Process-controlled tunability of the Ge-dot size (7.5−90 nm), the SiO2 thickness (3−4 nm), and as well the SiGe-shell thickness (2−15 nm) has been demonstrated, enabling a practically-achievable core building block for Ge-based metal-oxide-semiconductor (MOS) devices. Detailed morphologies, structural, and electrical interfacial properties of the SiO2/Ge-dot and SiO2/SiGe interfaces were assessed using transmission electron microscopy, energy dispersive x-ray spectroscopy, and temperature-dependent high/low-frequency capacitance-voltage measurements. Notably, NiGe/SiO2/SiGe and Al/SiO2/Ge-dot/SiO2/SiGe MOS capacitors exhibit low interface trap densities of as low as 3-5x10^11 cm^-2·eV^-1 and fixed charge densities of 1-5x10^11 cm^-2, suggesting good-quality SiO2/SiGe-shell and SiO2/Ge-dot interfaces. In addition, the advantage of having single-crystalline Si1-xGex shell (x > 0.5) in a compressive stress state in our self-aligned gate-stack heterostructure has great promise for possible SiGe (or Ge) MOS nanoelectronic and nanophotonic applications.

Single-fabrication-step Ge nanosphere/SiO2/SiGe heterostructures: a key enabler for realizing Ge MOS devices

We report channel and strain engineering of self-organized, gate-stacking heterostructures comprising Ge-nanosphere gate/SiO2/SiGe-channels. An exquisitely controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials was exploited to simultaneously create these heterostructures in a single oxidation step. Single-crystalline (100)/(110) Si}_{1-x}Ge}_{x} shells with Ge content as high as x= 0.85/0.35 and with a compressive strain of 3%/1.5% were achieved. Our high Ge-content, highly-stressed SiGe shells feature a high degree of crystallinity, providing a “building block” for the fabrication of Ge-based MOS devices.

Designer Ge quantum-dot phototransistors for highly-integrated, broadband optical interconnects

We report high-responsivity Ge quantum dots (QDs) MOS phototransistors as on-chip transducers for highly-integrated, broadband Si-based optical interconnects. Self-organized heterostructure of Ge-QD/SiO2/Si-channel is fabricated in a single step through selective oxidation of SiGe nano-pillars over a Si3N4 buffer layer on Si substrates. Dark current densities (10-7A/mm2), photocurrent-to-dark current ratio (~ 107) and photoresponsivities (>10 A/W), external quantum efficiency (~240%), and response time (1.4ns) are measured on the Ge-QD phototransistors under 850 nm illumination. Detection wavelength is tunable from near infrared to near ultraviolet by reducing the QD size from 90 to 7 nm, and the optimal photoresponsivity is tailored by the QD size and effective thickness of gate dielectrics.

Size tunable Ge quantum dot phototrasnsistors for optical interconnects with high figure of merits

We report a unique, CMOS approach for the inclusion of size-tunable (7-50-nm), spherical Ge quantum dots (QDs) into gate stacks of Si MOS transistors, through selective oxidation of SiGe pillars over the buffer layer of Si3N4 on top of the Si substrate. The Ge-QD MOS phototransistors feature extremely low dark current densities (Ioff ~ 0.27 pA/μm2), high Ion/Ioff (>106), steep subthreshold swing (~175 mV/dec at 300 K), superior external quantum efficiency (~240%), and fast response time of 1.4ns under illumination of 850 nm, providing a core building block for high-performance Ge optical transducers for on-chip optical switches and transducers for Si-based optical interconnect applications. Most importantly, the detection wavelength of the Ge QD is tunable from near infrared to near ultraviolet by reducing the QD size from 50 to 7 nm, and the optimal photoresponsivity is tailored by the Ge QD size and the effective thickness of gate dielectrics.

A novel approach to generate self-aligned Ge/SiO 2 /SiGe gate-stacking structures in a single fabrication step

We demonstrated a novel, self-aligned gate-stack heterostructure of Ge-quantum dot (QD)/SiO₂/SiGe-shell on Si with superior interfacial properties in a single step of selective oxidation of a SiGe pillar over a Si₃N₄ buffer layer on Si substrate. Ge metal-oxide-semiconductor (MOS) capacitors exhibit a quite low interface trap density on the order of 10¹¹ cm^-2eV^-1, and Ge n-MOSFETs show good turn on and off features with a subthreshld slope of 175 mV/dec and I_on/I_off > 10⁶.