Wei-Ting Lai

Nanoscale, Catalytically Enhanced Local Oxidation of Silicon-containing Layers by 'Burrowing' Ge Quantum Dots

A new phenomenon of highly localized, nanoscale oxidation of silicon-containing layers has been observed. The localized oxidation enhancement observed in both Si and Si(3)N(4) layers appears to be catalyzed by the migration of Ge quantum dots (QDs). The sizes, morphology, and distribution of the Ge QDs are influenced by the oxidation of the Si-bearing layers. A two-step mechanism of dissolution of Si within the Ge QDs prior to oxidation is proposed.

Designer germanium quantum dot phototransistor for near infrared optical detection and amplification

We demonstrated a novel CMOS approach for the fabrication of high-performance germanium quantum dot (QD) phototransistor (PT) offering great promises as optical switches and transducers for Si-based optical interconnects. Illumination produces significant enhancement in the drain current of Ge QD PTs when biased at both on-and off-states, primarily resulting from photoconductive and photovoltaic effects. Measured photocurrent to dark current ratio (Iph/Idark) and photoresponsivities from the Ge QD PT were as high as 53,000 and 2.7 A/W, respectively, under incident power of 0.9mW at 850 nm illumination.

Designer Ge quantum dots on Si: A heterostructure configuration with enhanced optoelectronic performance

An otherwise random, self-assembly of Ge quantum dots (QDs) on Si has been controlled by nano-patterning and oxidation to produce QDs with desired sizes, locations, and depths of penetration into the Si substrate. A heterostructure consisting of a thin amorphous interfacial oxide between the Ge QD and the Si substrate is shown to improve crystalline quality by de-coupling the lattice-matching constraint. A low dark current density of 1.1 μA/cm2 and a high photocurrent enhancement up to 35 000 and 1500, respectively, for 1.5 mW incident illumination at 850 nm and 1160 nm was measured on our Ge QD-based metal-oxide-semiconductor photodiodes.

Study of tunneling currents through germanium quantum-dot single-hole and -electron transistors

The transport properties of Ge quantum-dot (QD) single-hole and -electron transistors (SHTs/SETs) are experimentally investigated. The tunneling currents of Ge-SETs and -SHTs could be modulated by adjusting top Si layer thickness on silicon-on-insulator substrates or applying back-gate biases due to parasitic transistors effect. The Coulomb oscillation of tunneling current is stable with respect to temperature, indicating the observed current should go through the energy levels of a Ge QD but not through trap states. The k∙p method has been employed to calculate the hole energy levels of a spherical Ge QD to clarify the homogeneous oscillation current characteristic of SHTs.

SiGe Quantum Dots Over Si Pillars for Visible to Near-Infrared Broadband Photodetection

We demonstrate a successful selective growth of Si0.3Ge0.7 quantum dots (QDs) over array of p+-Si nanopillars using a low-pressure chemical vapor deposition technique, and hereafter realized high-performance QD broadband photodiodes for visible to near-infrared photodetection based on heterostructures of indium tin oxide/Si0.3Ge0.7 QD/Si pillar. Thanks to effective hole confinement and thus a built-in electric field within the SiGe QD, high ratios of photocurrent to dark current of ~2200, 100, and 30, respectively, were measured on our SiGe QDs-based photodiodes under illumination of 9 mW/cm2 at wavelength of 500-800, 1300, and 1500 nm. The QD photodiode exhibits a very low dark current density of 3.2 × 10-8 A/cm2 and a tunable power-dependent linearity by applied voltage through the competition of electron drift and carrier recombination processes.

CMOS-Compatible Generation of Self-Organized 3-D Ge Quantum Dot Array for Photonic and Thermoelectric Applications

We demonstrate a CMOS-compatible scheme, selective oxidation of SiGe pillars, for creating well-organized 3-D Ge quantum dot (QD) array by guiding QDs migration along the oxidation path and thus placing them on targeted locations where the ultimate oxidation occurs. Stacked QDs exhibit tunable luminescence over the visible and possess low thermal conductivity, showing promise for nanophotonic and energy conversion devices.

Room-temperature transient carrier transport in germanium single-hole/electron transistors

We report the experimental observation of transient carrier transports at room temperature in a Ge quantum-dot (QD) single-hole transistor (SHT) and single-electron transistor (SET). In addition to room-temperature Coulomb oscillations, hysteresis effects have been observed in the steady-state tunneling current of a Ge-SHT and a Ge-SET as gate voltage is swept in a loop. Time-dependent tunneling current of a Ge-SHT and a Ge-SET displays clear oscillatory or staircase behavior at a constant voltage stress condition, which indicates transient charging/discharging of electrons and holes via a Ge QD due to substantial quantum mechanics effect.

Room-temperature observation of large Coulomb-blockade oscillations from germanium Quantum-dot single-hole transistors with self-aligned electrodes

A single Ge quantum-dot (~10 nm) forms and self-aligns with source/drain electrodes via SiO2 tunneling barriers using thermal oxidation of a SiGe-on-insulator nanowire. Thereby, a Ge single-hole transistor with self-aligned electrodes is experimentally realized based on FinFET technology and features with clear Coulomb staircase/negative differential conductance and large Coulomb-blockade oscillation behaviors at room temperature. This work provides a simple approach to alleviate this nanofabrication bottleneck and thereby reduce series resistances and increase design freedom for SETs.

Gate-Stack Engineering for Self-Organized Ge-dot/SiO2/SiGe-Shell MOS Capacitors

We report the first-of-its-kind, self-organized gate-stack heterostructure of Ge-dot/SiO2/SiGe-shell on Si fabricated in a single step through the selective oxidation of a SiGe nano-patterned pillar over a Si3N4 buffer layer on a Si substrate. Process-controlled tunability of the Ge-dot size (7.5−90 nm), the SiO2 thickness (3−4 nm), and as well the SiGe-shell thickness (2−15 nm) has been demonstrated, enabling a practically-achievable core building block for Ge-based metal-oxide-semiconductor (MOS) devices. Detailed morphologies, structural, and electrical interfacial properties of the SiO2/Ge-dot and SiO2/SiGe interfaces were assessed using transmission electron microscopy, energy dispersive x-ray spectroscopy, and temperature-dependent high/low-frequency capacitance-voltage measurements. Notably, NiGe/SiO2/SiGe and Al/SiO2/Ge-dot/SiO2/SiGe MOS capacitors exhibit low interface trap densities of as low as 3-5x10^11 cm^-2·eV^-1 and fixed charge densities of 1-5x10^11 cm^-2, suggesting good-quality SiO2/SiGe-shell and SiO2/Ge-dot interfaces. In addition, the advantage of having single-crystalline Si1-xGex shell (x > 0.5) in a compressive stress state in our self-aligned gate-stack heterostructure has great promise for possible SiGe (or Ge) MOS nanoelectronic and nanophotonic applications.

Realization of solid-state nanothermometer using Ge quantum-dot single-hole transistor in few-hole regime

Semiconductor Ge quantum-dot (QD) thermometry has been demonstrated based on extraordinary temperature-dependent oscillatory differential conductance (GD) characteristics of Ge-QD single-hole transistors (SHTs) in the few-hole regime. Full-voltage width-at-half-minimum, V1/2, of GD valleys appears to be fairly linear in the charge number (n) and temperature within the QD in a relationship of eV1/2 ≅ (1 − 0.11n) × 5.15kBT, providing the primary thermometric quantity. The depth of GD valley is also proportional to charging energy (EC) and 1/T via ΔGD ≅ EC/9.18kBT, providing another thermometric quantity. This experimental demonstration suggests our Ge-QD SHT offering effective building blocks for nanothermometers over a wide temperature range with a detection temperature as high as 155 K in a spatial resolution less than 10 nm and temperature accuracy of sub-kelvin.