Po-Yu Ke

A fully integrated 24 GHz sub-harmonic image rejection mixer with quadrature coupler

In this paper, we demonstrated a 24-GHz SHIRM in a 0.15-mum GaAs pHEMT process. Since the proposed circuit with a symmetric layout provides good matches on amplitude and phase performances, the cancellation of the image signal can be accomplished easily. Therefore, the SHIRM has a greatest conversion loss of 13 dB and IRR of 19 dB under LO input power of 14.4 dBm, with all isolations better than 10 dB. According to the experimental results, this SHIRM with two quadrature couplers achieves good potentials in conversion loss, IRR, and compact size in the 24-GHz ISM band.

A fully integrated multi-band ED-mode pHEMT VCO using variable transformer and switched resonator

A systematic approach to the design of a reconfigurable LC-coupled voltage-controlled oscillator (VCO) is proposed in this article. The focus is on the choice of the reactive elements of the resonance tank which are most suitable to switch to the desired oscillation frequencies. The optimum Q of the tank will be determined by the selected component. We report a 0.5-µm enhancement–depletion (ED) mode pHEMT (HEMT, high-electron mobility transistor) multiple-frequency VCO, and the generation of multiple frequencies are achieved using switched resonator topology. LC-tank circuit is built by square transformers. By careful selection of the reactive elements, evenly distributed results showed at each designed band. The multi-band ED-mode pHEMT VCO showed the output power of −4.7 dBm for 2 GHz band, −6.67 dBm for 3.86 GHz band and −5.9 dBm for 4.5 GHz band, respectively. The phase noises at 1 MHz offset frequency from carrier were −112.8 dBc/Hz for 2 GHz, −105 dBc/Hz for 3.86 GHz and −103.3 dBc/Hz for 4.5 GHz, respectively. The total chip size is only 1.17 × 0.83 mm2.

An X-band ultra-low phase noise differential Colpitts voltage-controlled oscillator using 0.15 μm pseudomorphic high electron mobility transistor technology

A low phase noise and a high output power X-band differential Colpitts pseudomorphic high electron mobility transistor (pHEMT) voltage-controlled oscillator (VCO) is proposed in this study. In general, pHEMT achieves a lower noise up-conversion factor than heterojunction bipolar transistor because of the inherent linear behaviour at optimal gate bias voltage. Therefore, a high linearity 0.15 μm gate length power pHEMT with Colpitts architecture was beneficial for obtaining a low phase noise oscillator together with a high output power characteristic. It achieves an excellent figure of merit of −181.6 dBc/Hz and a power output of 0.67 dBm at 8.6 GHz. In this design, depletion-mode pHEMT was adopted in the VCO core, and a balanced structure was chosen for Colpitts topology to suppress undesired common-mode noise. The VCO was operated from 8.5 GHz to 9.35 GHz with 9.4% tuning range; the measured phase noises at 1 MHz offset were −105.6 dBc/Hz at 9 GHz and −120.46 dBc/Hz at 8.6 GHz, respectively. The current consumption of the VCO core was only 17.6 mA.

A 60 GHz wide tuning range CMOS self-oscillating mixer using a push-push VCO technique

A wide tuning self-oscillating mixer (SOM) operating from 56 to 64 GHz, using 90nm CMOS technology, is proposed in this work. The entire circuit of a voltage control oscillator (VCO) core, a mixer core and couple line marchand balun. The balanced mixer is symmetric, inherently broad band, and need an LO balun combined with the parasitic capacitances from the mixer. The VCO are used in a 60-GHz push-pull circuit to generate the second harmonic, and a 30-GHz dielectric resonator was used to stabilize the fundamental oscillation frequency. The LC-tank oscillator also functions as a single-balanced LO load to the mixer core. A theoretical expression is given for the conversion gain of the SOM taking into account the time-varying nature of the LO load impedance. Measurements show that the SOM has a conversion gain of 3.4 dB. Its output P1dB is -12.4 dBm. The chip consumes 17.9 mW of dc power and it occupies an area of 0.64 mm2 without pads.

A direct conversion WiMAX RF receiver front-end in GaAs 0.5µm ED-mode pHEMT technology

This paper presents a direct conversion RF receiver front-end supporting the WiMAX (802.16e) standard. The front-end is implemented in 0.5 um GaAs ED-Mode pHEMT technology and designed using the ADS software. It shows how the design flow can be accelerated starting from the standard specifications and going down to schematics. All this is accompanied by test benches to extract the relevant metrics. This front-end provides a total gain of 13 dB.

High performance 0.15 µm gate pHEMT V-band tripler using compact microstrip resonant cell (CMRC) technique

A V -band current reuse frequency tripler is developed in 0.15um pseudomorphic high electron mobility transistor (pHEMT) technology. This tripler combines the compact microstrip resonant cell (CMRC) topology for suppress unwanted harmonic and current-reuse technique to improve the conversion gain. At 60 GHz, the tripler achieved as minimum conversion gain of −16.6 dB at an input power of 8 dBm; the suppressions of the fundamental and second harmonic frequencies were 22 dB and 27 dB, respectively.

High-Performance 90-nm Dual-Gate nMOSFETs With Field-Plate Technology

In this letter, high-performance 90-nm dual-gate nMOSFETs with field-plate (FP) metal were demonstrated for high-power and low-frequency noise device applications. The pro posed dual-gate nMOSFETs with FP metals had a higher maximum oscillation frequency (fMAX)>; a lower noise power spectral density, and a higher output power (Pout) than traditional dual gate architecture. These improvements were obtained because two extra FP-induced depletion regions were present, and the total electrical field was suppressed, yielding high output resistance and higher output power. These FP-induced depletion regions also pushed the carriers into deeper channels and reduced the number of opportunities for carriers to be trapped by surface states between gate and drain terminals. Based on the dependence of the normalized noise power spectral density (SID/ID2) on the gate voltage, the FP dual gate had a low noise power spectral density and a low range of Hooge factors at high current.

Voltage-controlled oscillator phase-noise improvement using a GaAs 0.5 µm Pt-buried gate enhancement-mode pHEMT

This paper presents a voltage-controlled oscillator (VCO) with low phase-noise performance by employing the Pt-buried gate process in enhancement-mode (E-mode) pHEMT technology. After the 4 h stabilization bake process, Pt diffuses into an AlGaAs Schottky layer to form a PtAs2 amorphous layer and native dangling bonds in AlGaAs can be eliminated to improve surface flicker noise. To further evaluate the Pt/AlGaAs interface stability at continuous waveform output operation, the cross-coupled 9 GHz VCO with an E-mode pHEMT (Pt/Ti/Pt/Au gate) and depletion-mode (D-mode) pHEMTs was designed and fabricated in a 0.5 ?m gate length 6 inch GaAs wafer simultaneously. The measured phase noise of the Pt-buried gate E-mode pHEMT VCO is ?126 dBc Hz?1 at the 1 MHz offset frequency. Compared to the D-mode pHEMT VCO, this novel design achieved an average 10 dB phase-noise improvement at the offset frequency from 100 kHz to 10 MHz.

Efficiency design of a 10GHz CMOS oscillator

A fully on-chip transformer-based coupling 10 GHz CMOS oscillator is presented in this paper. By using on-chip transformer to reduce Si substrate loss of RF coupling and matching, a maximum DC-to-RF conversion efficiency of 16% with an output RF power of ~10 dBm at 9.98 GHz is achieved.

A Compact 20-35 GHz Quadrature Coupler using 0.15um pHEMT Coplanar Waveguide Technology

A coplanar waveguide (CPW) mode 20-35 GHz quadrature coupler has been demonstrated in this study. Good microwave performance and compact size can be achieved simultaneously. The measured return loss is better than 16.6 dB and insertion loss of S21 and S31 are 3.6 plusmn 0.2 dB. The measured phase difference is 88 plusmn 2deg from 20 to 35 GHz. Total chip size including RF pads is 0.72 times 0.48 cm2. Comparing the performance and chip-size between an non-bending and a bending couplers, the bending one shows 0.4 dB worse in simulated insertion loss than the other but the chip-size is 50 percent in reduction. This circuit is adaptable for the applications in wideband double balanced mixers and power amplifiers.