Ramanathan Ramani

Automatic current sharing mechanism in the series capacitor buck converter

This study examines the mechanism and effectiveness of current sharing in a multiphase, series capacitor buck converter. The automatic current sharing mechanism is inherent to the series capacitor buck topology and uniquely utilizes its series capacitor. Unlike conventional multiphase buck converters, current sharing is achieved without any current sensing circuits or added external control loops. Analysis of the automatic current sharing mechanism explains its robustness to variations in inductance, dc resistance (DCR), and temperature. Unequal control switch on-times are found to have measurable impact on sharing accuracy. Results from a two-phase, 12 V input, 10 A output hardware prototype demonstrate the simple, highly accurate current sharing capabilities of the series capacitor buck converter. Experimental results for unequal on-times exhibit unmatched average currents but stable operation with a dc offset.

A 5 MHz, 12 V, 10 A, monolithically integrated two-phase series capacitor buck converter

This paper presents the first monolithically integrated two-phase series capacitor buck converter. This converter achieves over 60 A/cm3 current density. The series capacitor buck converter topology enables high frequency (HF) operation up to 5 MHz per phase without special magnetics or compound semiconductors. An adaptive constant on-time controller provides fast load transient response and fixed frequency operation in steady state. The series capacitor is precharged before switching and monitored to protect against faults. Experimental results for a 12 V input, 1.2V/10A output application demonstrate higher peak efficiency than a conventional buck converter while operating at 4 times higher switching frequency.

A 3V to 6V in, 6A out synchronous buck PWM integrated FET switcher design uses state-of-art power IC technology

A 3V to 6V input, 6A output synchronous buck PWM switcher with integrated FETs; TI code name SWIFT/spl trade/ has been fabricated using a combination of past reported power IC technology. In this IC we extended a production 0.72/spl mu/m technology with enhanced features and then combined mixed circuit design with integrated thin-gate oxide, planar, very-thin-resurf VTR LDMOS FETs. The Power IC uses plated CuNiPd top metal for low resistance busing and bonding over active area and is packaged in a thin line 28 pin TSSOP package having a POWERPAD/spl trade/. The technology combination yields a state-of-art performance power IC. The device is capable of 95% efficiency and is excellent for point-of-load applications such as DSP solutions as well as high density distributed power systems. The key to high efficiency in this product is dual low Ron=30 m/spl Omega/ fets, low gate charge losses, and low reverse recovery losses during power FET switching.