Prasad Sarangapani

Optimum High-k Oxide for the Best Performance of Ultra-Scaled Double-Gate MOSFETs

A widely used technique to mitigate gate leakage in ultrascaled metal oxide semiconductor field effect transistors ( mosfets) is the use of high-k dielectrics, which provide the same equivalent oxide thickness (EOT) as SiO2, but thicker physical layers. However, using a thicker physical dielectric for the same EOT has a negative effect on the device performance due to the degradation of 2D electrostatics. In this paper, the effects of high-k oxides on double-gate (DG) mosfet with gate length under 20 nm are studied. All the devices are modeled using an effective mass quantum transport approach based on the quantum transmitting boundary method, where only ballistic transport is considered. We find that there is an optimum physical oxide thickness (TOX) to achieve the best performance in terms of on-current for each gate stack, including SiO2 interface layer and one high-k material. For the same EOT, Al2O3 (k = 9) over 3-Å SiO2 provides the best performance, while for HfO2 (k = 22) and La2O3 (k = 30), SiO2 thicknesses should be 5 Å and 7 Å, respectively. The effects of using high-k oxides and gate stacks on the performance of ultrascaled mosfets are analyzed. While thin oxide thickness increases the gate leakage, the thick oxide layer reduces the gate control on the channel. Therefore, the physical thicknesses of gate stack should be optimized to achieve the best performance.

Control of interlayer physics in 2H transition metal dichalcogenides

It is assessed in detail both experimentally and theoretically how the interlayer coupling of transition metal dichalcogenides controls the electronic properties of the respective devices. Gated transition metal dichalcogenide structures show electrons and holes to either localize in individual monolayers, or delocalize beyond multiple layers—depending on the balance between spin-orbit interaction and interlayer hopping. This balance depends on the layer thickness, momentum space symmetry points, and applied gate fields. The design range of this balance, the effective Fermi levels, and all relevant effective masses is analyzed in great detail. A good quantitative agreement of predictions and measurements of the quantum confined Stark effect in gated MoS2 systems unveils intralayer excitons as the major source for the observed photoluminescence.

Multi-scale, multi-physics NEGF quantum transport for nitride LEDs

The operation of multi-quantum well LEDs is determined by the carrier flow through complex, extended quantum states, the optical recombination between these states and the optical fields in the device. Non-equilibrium Green Function Formalism (NEGF) is the state-of-the-art approach for quantum transport, however when it is applied in its textbook form it is numerically too demanding to handle realistically extended devices. This work introduces a new approach to LED modeling based on a multi-scaled NEGF approach that subdivides the critical device domains and separates the quantum transport from the recombination treatments. First comparisons against experimental data appear to be promising.

Tunneling: The major issue in ultra-scaled MOSFETs

As transistors scale below 10 nm, the numbers of atoms and electrons are countable in the critical device areas. At this scale, quantum mechanical phenomena start playing an important role in the performance of the transistors. One of the major quantum mechanical effects is tunneling; i.e. tunneling between the gate and channel due to the reduction of physical oxide layer thickness and direct tunneling between the source and drain due to scaling down of channel length. This paper discusses these tunneling issues on performance of ultra-scaled transistors based on rigorous atomistic simulations and provides some solutions for scaling based on a quantitative analysis.

NEMO5: realistic and efficient NEGF simulations of GaN light-emitting diodes

The design and optimization of realistically extended multi-quantum-well GaN-based light emitting diodes requires a quantitative understanding of the quantum mechanics-dominated carrier flow. Typical devices can be characterized by spatial regions of extremely high carrier densities such as n-GaN/p-GaN layers and quantum wells coupled to each other by tunneling and thermionic emission-based quantum transport. This work develops a multi-scale model that partitions the device into different spatial regions where the high carrier domains are treated as reservoirs in local equilibrium and serve as injectors and receptors of carriers into the neighboring reservoirs through tunneling and thermionic emission. The nonequilibrium Greens function (NEGF) formalism is used to compute the dynamics (states) and the kinetics (filling of states) in the entire extended complex device. The local density of states in the whole device is computed quantum mechanically within a multi-band tight binding Hamiltonian. The model results agree with experimental I-V curves quantitatively. Our results indicate tunneling to be a major contributor to the total charge current in LEDs.

Atomistic modeling trap-assisted tunneling in hole tunnel field effect transistors

Tunnel Field Effect Transistors (FETs) have the potential to achieve steep Subthreshold Swing (S.S.) below 60 mV/dec, but their S.S. could be limited by trap-assisted tunneling (TAT) due to interface traps. In this paper, the effect of trap energy and location on OFF-current (IOFF) of tunnel FETs is evaluated systematically using an atomistic trap level representation in a full quantum transport simulation. Trap energy levels close to band edges cause the highest leakage. Wave function penetration into the surrounding oxide increases the TAT current. To estimate the effects of multiple traps, we assume that the traps themselves do not interact with each other and as a whole do not modify the electrostatic potential dramatically. Within that model limitation, this numerical metrology study points to the critical importance of TAT in the IOFF in tunnel FETs. The model shows that for Dit higher than 1012/(cm2 eV) IOFF is critically increased with a degraded ION/IOFF ratio of the tunnel FET. In order to have ...

Explicit screening full band quantum transport model for semiconductor nanodevices

State of the art quantum transport models for semiconductor nanodevices attribute negative (positive) unit charges to states of the conduction (valence) band. Hybrid states that enable band-to-band tunneling are subject to interpolation that yield model dependent charge contributions. In any nanodevice structure, these models rely on device and physics specific input for the dielectric constants. This paper exemplifies the large variability of different charge interpretation models when applied to ultrathin body transistor performance predictions. To solve this modeling challenge, an electron-only band structure model is extended to atomistic quantum transport. Performance predictions of MOSFETs and tunneling FETs confirm the generality of the new model and its independence of additional screening models.

Assessment of Si/SiGe PMOS Schottky contacts through atomistic tight binding simulations: Can we achieve the 10 −9 Ω·cm? target?

With continuous shrinking of devices in accordance with Moores law, metal-semiconductor resistivity starts playing an important role for device performance. To meet ITRS target of 10−9 Ω·cm2 by 2023, it is important to evaluate the effect of different device parameters such as doping concentration, Schottky barrier height, strain and SiGe mole fraction on contact resistivity. In this work, such a resistivity study has been done on Si/SiGe PMOS contacts through 10-band atomistic tight binding quantum transport simulations. Optimum target values for barrier height as a function of doping concentration are obtained.

Grain boundary resistance in nanoscale copper interconnections

As logic devices continue to downscale, interconnections are reaching the nanoscale where quantum effects are important. In this work we introduce a semi-empirical method to describe the resistance of copper interconnections of the sizes predicted by ITRS roadmap. The resistance calculated by our method was benchmarked against DFT for single grain boundaries. We describe a computationally efficient method that matches DFT benchmarks within a few percent. The 1000x speed up compared to DFT allows us to describe grain boundaries with a 30 nm channel length that are too large to be simulated by ab-initio methods. The electrical resistance of these grain boundaries has a probability density distribution as a function of the grain rotation angles. This approach allows us to quantitatively obtain the most likely resistance for each configuration.

Quantum dot lab: an online platform for quantum dot simulations

An online platform for simulating quantum dots has been shown. The tool has been deployed on nanoHUB and can simulate quantum dots with varying degrees of complexity acting as a research and learning tool for the scientific community. The tool will include ability to simulate random alloys and ability to import disordered structures and calculate energy levels for such disordered systems in the future.