Priyanka Periwal

Composition-dependent interfacial abruptness in Au-catalyzed Si(1-x)Ge(x)/Si/Si(1-x)Ge(x) nanowire heterostructures.

As MOSFETs are scaled down, power dissipation remains the most challenging bottleneck for nanoelectronic devices. To circumvent this challenge, alternative devices such as tunnel field effect transistors are potential candidates, where the carriers are injected by a much less energetically costly quantum band to band tunneling mechanism. In this context, axial nanowire heterointerfaces with well-controlled interfacial abruptness offer an ideal structure. We demonstrate here the effect of tuning the Ge concentration in a Si1-xGex part of the nanowire on the Si/Si1-xGex and Si1-xGex/Si interfacial abruptness in axial Si-Si1-xGex nanowire heterostructures grown by the Au-catalyzed vapor-liquid-solid method. The two heterointerfaces are always asymmetric irrespective of the Ge concentration or nanowire diameter. For a fixed diameter, the value of interface abruptness decreases with increasing the Ge content for the Si/Si1-xGex interface but shows no strong Ge dependence at the Si1-xGex/Si interface where it features a linear correlation with the nanowire diameter. To rationalize these findings, a kinetic model for the layer-by-layer growth of nanowire heterostructures from a ternary Au-Ge-Si alloy is established that predicts a discrepancy in Ge concentration in the layer and the catalyst droplet. The Ge concentration in each layer is predicted to be dependent on the composition of the preceding layer. The most abrupt heterointerface (∼5 nm) is achieved by growing Si1-xGex with x = 0.85 on Si in a 25 nm diameter nanowire.

Percolating silicon nanowire networks with highly reproducible electrical properties.

Here, we report the morphological and electrical properties of self-assembled silicon nanowires networks, also called Si nanonets. At the macroscopic scale, the nanonets involve several millions of nanowires. So, the observed properties should result from large scale statistical averaging, minimizing thus the discrepancies that occur from one nanowire to another. Using a standard filtration procedure, the so-obtained Si nanonets are highly reproducible in terms of their morphology, with a Si nanowire density precisely controlled during the nanonet elaboration. In contrast to individual Si nanowires, the electrical properties of Si nanonets are highly consistent, as demonstrated here by the similar electrical properties obtained in hundreds of Si nanonet-based devices. The evolution of the Si nanonet conductance with Si nanowire density demonstrates that Si nanonets behave like standard percolating media despite the presence of numerous nanowire-nanowire intersecting junctions into the nanonets and the native oxide shell surrounding the Si nanowires. Moreover, when silicon oxidation is prevented or controlled, the electrical properties of Si nanonets are stable over many months. As a consequence, Si nanowire-based nanonets constitute a promising flexible material with stable and reproducible electrical properties at the macroscopic scale while being composed of nanoscale components, which confirms the Si nanonet potential for a wide range of applications including flexible electronic, sensing and photovoltaic applications.

Multimode silicon nanowire transistors.

The combined capabilities of both a nonplanar design and nonconventional carrier injection mechanisms are subject to recent scientific investigations to overcome the limitations of silicon metal oxide semiconductor field effect transistors. In this Letter, we present a multimode field effect transistors device using silicon nanowires that feature an axial n-type/intrinsic doping junction. A heterostructural device design is achieved by employing a self-aligned nickel-silicide source contact. The polymorph operation of the dual-gate device enabling the configuration of one p- and two n-type transistor modes is demonstrated. Not only the type but also the carrier injection mode can be altered by appropriate biasing of the two gate terminals or by inverting the drain bias. With a combined band-to-band and Schottky tunneling mechanism, in p-type mode a subthreshold swing as low as 143 mV/dec and an ON/OFF ratio of up to 104 is found. As the device operates in forward bias, a nonconventional tunneling transistor is realized, enabling an effective suppression of ambipolarity. Depending on the drain bias, two different n-type modes are distinguishable. The carrier injection is dominated by thermionic emission in forward bias with a maximum ON/OFF ratio of up to 107 whereas in reverse bias a Schottky tunneling mechanism dominates the carrier transport.

Enhanced nonlinear optical response from individual silicon nanowires

© 2015 American Physical Society. We report about the experimental observation and characterization of nonlinear optical properties of individual silicon nanowires of different dimensions. Our results show that the nonlinear light has different components, with one of them corresponding to the second-harmonic generation (SHG). The SHG strongly depends on the polarization of the optical excitation and nanowire diameter, and gives access to the local electromagnetic field intensity distribution. Furthermore, we show that the second harmonic, when observed, is enhanced compared to bulk silicon and is sensitive to optical resonances supported by the nanowires. This offers different perspectives on the definition of silicon-based nonlinear photonic devices.

Control of the interfacial abruptness of Au-catalyzed Si-Si1−xGex heterostructured nanowires grown by vapor–liquid–solid

Axial Si-Si1−xGex heterostructured nanowires were grown by Au-catalyzed vapor–liquid–solid method. In this work, the authors examine the changes in growth parameters on the interfacial-abruptness of Si-Si1−xGex heterointerfaces in nanowires. The authors have investigated the effect of temperature drop, pressure change, and growth stop on the droplet stability which in turn modifies nanowire morphology and interfacial abruptness. The authors found that Si/Si1−xGex heterointerface is relatively sharp while Si1−xGex/Si is much broader. They demonstrate that a short growth stop is a good way to minimize reservoir effect resulting in small interfacial abruptness value. Our observations reveal that Si/Si1−xGex interfacial abruptness is 20 ± 5 nm irrespective of the nanowire diameter while interfacial abruptness for Si1−xGex/Si is linearly dependent on nanowire diameter.

Growth dynamics of SiGe nanowires by the vapour–liquid–solid method and its impact on SiGe/Si axial heterojunction abruptness

The vapour-liquid-solid (VLS) method is by far the most extended procedure for bottom-up nanowire growth. This method also allows for the manufacture of nanowire axial heterojunctions in a straightforward way. To do this, during the growth process, precursor gases are switched on/off to obtain the desired change in the nanowire composition. Using this technique, axially heterostructured nanowires can be grown, which are crucial for the fabrication of electronic and optoelectronic devices. SiGe/Si nanowires are compatible with complementary metal oxide semiconductor (CMOS) technology, which improves their versatility and the possibility of integration with current electronic technologies. Abrupt heterointerfaces are fundamental for the development and correct operation of electronic and optoelectronic devices. Unfortunately, the VLS growth of SiGe/Si heterojunctions does not provide abrupt transitions because of the high solubility of group IV semiconductors in Au, with the corresponding reservoir effect that precludes the growth of sharp interfaces. In this work, we studied the growth dynamics of SiGe/Si heterojunctions based on already developed models for VLS growth. A composition map of the Si-Ge-Au liquid alloy is proposed to better understand the impact of the growing conditions on the nanowire growth process and the heterojunction formation. The solution of our model provides heterojunction profiles that are in good agreement with the experimental measurements. Finally, an in-depth study of the composition map provides a practical approach to the drastic reduction of heterojunction abruptness by reducing the Si and Ge concentrations in the catalyst droplet. This converges with previous approaches, which use catalysts aiming to reduce the solubility of the atomic species. This analysis opens new paths to the reduction of heterojunction abruptness using Au catalysts, but the model can be naturally extended to other catalysts and semiconductors.

Nanoscale Surface and Sub-Surface Chemical Analysis of SiGe Nanowires

Si/Si1-xGex axial heterostructured nanowires (hNW) are under investigation for downscaling of metaloxide-semiconductor field-effect transistors (MOSFETs). New architectures based on vertically aligned nanowires tunnel-FETs are promising candidates for reduced power dissipation and low voltage operation [1]. The axial growth of lattice mismatched heterostructures would allow band-gap engineering along the charge transport direction. Adequate control of the chemical composition along axial and radial directions is of upmost importance for this band-gap engineering.

Stability of Schottky and Ohmic Au Nanocatalysts to ZnO Nanowires

Manufacturable nanodevices must now be the predominant goal of nanotechnological research to ensure the enhanced properties of nanomaterials can be fully exploited and fulfill the promise that fundamental science has exposed. Here, we test the electrical stability of Au nanocatalyst-ZnO nanowire contacts to determine the limits of the electrical transport properties and the metal-semiconductor interfaces. While the transport properties of as-grown Au nanocatalyst contacts to ZnO nanowires have been well-defined, the stability of the interfaces over lengthy time periods and the electrical limits of the ohmic or Schottky function have not been studied. In this work, we use a recently developed iterative analytical process that directly correlates multiprobe transport measurements with subsequent aberration-corrected scanning transmission electron microscopy to study the electrical, structural, and chemical properties when the nanowires are pushed to their electrical limits and show structural changes occur at the metal-nanowire interface or at the nanowire midshaft. The ohmic contacts exhibit enhanced quantum-mechanical edge-tunneling transport behavior because of additional native semiconductor material at the contact edge due to a strong metal-support interaction. The low-resistance nature of the ohmic contacts leads to catastrophic breakdown at the middle of the nanowire span where the maximum heating effect occurs. Schottky-type Au-nanowire contacts are observed when the nanowires are in the as-grown pristine state and display entirely different breakdown characteristics. The higher-resistance rectifying I-V behavior degrades as the current is increased which leads to a permanent weakening of the rectifying effect and atomic-scale structural changes at the edge of the Au interface where the tunneling current is concentrated. Furthermore, to study modified nanowires such as might be used in devices the nanoscale tunneling path at the interface edge of the ohmic nanowire contacts is removed with a simple etch treatment and the nanowires show similar I-V characteristics during breakdown as the Schottky pristine contacts. Breakdown is shown to occur either at the nanowire midshaft or at the Au contact depending on the initial conductivity of the Au contact interface. These results demonstrate the Au-nanowire structures are capable of withstanding long periods of electrical stress and are stable at high current densities ensuring they are ideal components for nanowire-device designs while providing the flexibility of choosing the electrical transport properties which other Au-nanowire systems cannot presently deliver.

Electrical characterisation of horizontal and vertical gate-all-around Si/SiGe nanowires field effect transistors

This paper report the technological routes used to build horizontal and vertical gate all-around (GAA) Field-Effect Transistors (FETs) using both Si and SiGe NanoWires (NWs). Horizontal Si and SiGe nanowires FETs are characterized in back gate configuration. Vertical devices using Si nanowires (NWs) show good characteristics with an I_ON/I_OFF ratio close to 10⁶ and sub-threshold slope around 145 mV/decade. Finally, vertical SiGe devices also obtained with the same technological process present an I_ON/I_OFF ratio from 10³ to 10⁴ but also poor dynamics which can be explained by the high interface traps density.

High density and taper-free boron doped Si1−xGex nanowire via two-step growth process

The authors study Au catalyzed chemical vapor growth of Si1−xGex alloyed nanowires in the presence of diborane, serving as a dopant precursor. Our experiments reveal that introduction of diborane has a significant effect on doping and morphology. Boron exposure poisons the Au catalyst surface, suppresses catalyst activity, and causes significantly tapered wires, as a result of conformal growth. The authors develop here a two-step method to obtain high density and taper-free boron doped Si1−xGex alloy nanowires. The two-step process consists of: (1) growth of a small undoped Si1−xGex section and (2) introduction of diborane to form a boron doped Si1−xGex section. The catalyst preparation step remarkably influences wire yield, quality and morphology. The authors show that dopant-ratio influences wire resistivity and morphology. Resistivity for high boron doped Si1−xGex nanowire is 6 mΩ-cm. Four probe measurements show that it is possible to dope Si1−xGex alloy nanowires with diborane.The authors study Au catalyzed chemical vapor growth of Si1−xGex alloyed nanowires in the presence of diborane, serving as a dopant precursor. Our experiments reveal that introduction of diborane has a significant effect on doping and morphology. Boron exposure poisons the Au catalyst surface, suppresses catalyst activity, and causes significantly tapered wires, as a result of conformal growth. The authors develop here a two-step method to obtain high density and taper-free boron doped Si1−xGex alloy nanowires. The two-step process consists of: (1) growth of a small undoped Si1−xGex section and (2) introduction of diborane to form a boron doped Si1−xGex section. The catalyst preparation step remarkably influences wire yield, quality and morphology. The authors show that dopant-ratio influences wire resistivity and morphology. Resistivity for high boron doped Si1−xGex nanowire is 6 mΩ-cm. Four probe measurements show that it is possible to dope Si1−xGex alloy nanowires with diborane.