Qianwei Kuang

Physical properties and electrical characteristics of H2O-based and O3-based HfO2 films deposited by ALD

Ozone (O3) and H2O are used as the oxidant to deposit hafnium oxide (HfO2) thin films on p-type Si (1 0 0) wafers by atomic layer deposition (ALD). The physical properties and electrical characteristics of HfO2 films change greatly for different oxidants and deposition temperature. Compared with O3 as the oxidant, HfO2 films grown with H2O as the oxidant are more consistent in composition and growth rate. The O3based HfO2 films have lower C impurity and higher concentration N impurity than the H2O-based HfO2 films. The impact of the annealing process on the electrical properties and stability of HfO2 films are also investigated. A width step is observed in the O3-based HfO2 C–V curves, which disappears after annealing process. It is because the unstable Hf–O–N and Hf–N bonds in O3-based HfO2 films are re-bonded with the non-HfO2 oxygen after annealing process, and the binding energy of N1s shifts.

Defect Detection of IC Wafer Based on Spectral Subtraction

In this paper, spectral subtraction is successfully applied to image processing and to detect defects in the integrated circuit (IC) image. By utilizing the characteristics of many of the same chips in a wafer, three images with defects located in the same position and different chips are obtained. The defect images contain the spectrum of standard image without any defects. Spectral subtraction presented in the paper can extract the standard image from the three defect images. The algorithm complexity of spectral subtraction detecting defects is close to that of Fourier transform. After obtaining the standard image, the speed and accuracy of defects detection can be greatly enhanced using the detection method presented in the paper. Using the image gray-scale matching technology, impact of illumination on IC defect detection is solved. Experiments demonstrate that spectral subtraction is fast and accurate to defect detection in an IC image, and the method has high robustness for illumination.

Defect detection of IC wafer based on two-dimension wavelet transform

Defect detection of integrated circuit (IC) wafer based on two-dimension wavelet transform (2-D DWT) is presented in this paper. By utilizing the characteristics many of the same chips in a wafer, three images with defects located in the same position and different chips are obtained. The defect images contain the standard image without any defects. 2-D DWT presented in the paper can extract the standard image from the three defect images. The algorithm complexity of the method is close to that of 2-D DWT. After obtaining the standard image, the speed and accuracy of defects detection can be greatly enhanced using the detection method presented in the paper. Using the image gray-scale matching technology, impact of illumination on IC defect detection is solved. Experiments demonstrate that 2-D DWT is fast and accurate to defects detection in an IC image, and the method has high robustness for illumination.

Frequency dispersion effect and parameters extraction method for novel HfO 2 as gate dielectric

The electric characteristic of MOS capacitor with HfO2/SiO2/p-Si grown by ALCVD (atom layer chemical vapor deposition) is investigated. The C-V curves show that the accumulation capacitances take on the frequency dispersion at high frequency. For MOS capacitor with ultra thin HfO2/SiO2 gate stack, different fabrication processes and measurement equipment will cause parasitic effect. Here an equivalent circuit model that can eliminate the frequency dispersion effect is proposed. The C-V characteristics curve at high frequency shows some distortion because of the bulk defects and the interface states. This paper discusses the distortion of the high frequency MOS C-V characteristic curve. A data processing method is advanced and interface trap density distribution in the band gap is presented. By comparing the ideal C-V curve with the experimental C-V curve, the typical electrical parameters of MOS capacitor are extracted, including the shift of flat-band voltage, the oxide charges and the density of interface traps at the SiO2/Si interface.

Photo-generated parasitical capacitance model of GaN-based pin ultraviolet detector

This paper investigates the variation of depletion region width in the p and n layers and the total depletion region width of GaN-based pin ultraviolet (UV) detector with applied voltage. The variation of barrier capacitance with applied voltage is presented. The carrier number in the depletion region of detector generated by the light irradiation has relationships with width of the depletion region. Based on the definition of differential capacitance, the model including the photo-generated parasitical capacitance is presented. Finally, this paper systematically analyzes the influence of doping concentration on the photo-generated parasitical capacitance, response time and the cutoff frequency of GaN-based pin ultraviolet detector. By compared with the experiment results, the validity of the model is verified.

Performance analysis of dual-material gate SOI MOSFET

In this paper, a novel device structure called dual-material gate SOI MOSFET (DMG SOI MOSFET) is proposed to restrain drain-induced barrier lowering (DIBL) and short-channel effect (SCE) for the advanced nanometer process. The analytical threshold voltage model of novel structure device is presented, and the electrical characteristics are analyzed. The DMG SOI MOSFET with high k dielectric shows better performance in suppressing DIBL and enhancing carrier transport efficiency than the conventional SOI MOSFET. The DIBL is reduced with increasing dielectric constant. The analytical threshold voltage model is in good agreement with the two-dimensional device simulator ISE.

Transport mechanism of the leakage current in MIS capacitor with HfO 2 /SiO 2 stack gate

I-V characteristic of the HfO<inf>2</inf>/SiO<inf>2</inf> stack gate MIS capacitor is investigated. The gate leakage current in HfO<inf>2</inf>/SiO<inf>2</inf> stack gate MIS capacitor decreases after constant voltage stress, which is caused by electron trapping. By analyzing the experiment and calculation results, the main transport mechanisms of the gate leakage current in HfO<inf>2</inf>/SiO<inf>2</inf> stack gate is presented. The different transport mechanisms in HfO<inf>2</inf> gate and HfO<inf>2</inf>/SiO<inf>2</inf> stack gate are proposed.

An efficient model for trap analysis in C-V measurement for AlGaN/GaN heterostructure

In this work, we propose an improved small signal equivalent capacitance-voltage (C-V) model to eliminate frequency dispersion in measurement for the AlGaN/GaN heterostructure, and then we calculate the trap density in the buffer layer. Compared with photoluminescence (PL) and high resolution X-ray power diffraction (HRXRD) data, it reveals that the main component of trap is made up of the point defect. Fluorine treatment is done in one sample, positive shift of the pinch-off voltage shows that the F ions have injected into the sample effectively, and the dramatic drop of trap density shows that gallium vacancies is the main component of the trap. All this result shows the advantage of the improved model on the analysis of the trap behavior in the AlGaN/GaN heterostructure.

Investigation of electrical characteristics of NdAlO 3 /SiO 2 stack gate

Degradation of electrical characteristics of NdAlO3/SiO2 stack gate under the constant voltage stress (CVS) is presented. It is found that the electron trapping, positive charges and oxide trap generation acts together, which causes the degradation of NdAlO3/SiO2 stack gate. The transport mechanisms of the gate leakage current in NdAlO3/SiO2 stack gate are also investigated. Frenkel-Poole emission and Schottky emission are the main transport mechanisms of the gate leakage current for the fresh sample, while F-N tunneling and Schottky emission are responsible for the gate leakage current after stress.

Defects detecting method of copper interconnects based on signal reflection theory

Based on the signal reflection theory, this paper investigates the diction method of loss object defects in copper interconnects. The signal is reflected at the edge of impedance discontinuity, which is caused by the defects in interconnects. The reflection results of defects with different size and with different signal rise time are investigated. The results show that signal reflection caused by the defects is very obvious for the defect of 1µm length and signal rise time of 0.01ps. The defects can be detected easily in this case. The reasons of rapid rise time of signal are analyzed at the end of this paper.