Quan Le

A 95-dB linear low-power variable gain amplifier

An all-CMOS variable gain amplifier (VGA) that adopts a new approximated exponential equation is presented. The proposed VGA is characterized by a wide range of gain variation, temperature-independence gain characteristic, low-power consumption, small chip size, and controllable dynamic gain range. The two-stage VGA is fabricated in 0.18-mum CMOS technology and shows the maximum gain variation of more than 95 dB and a 90-dB linear range with linearity error of less than plusmn 1 dB. The range of gain variation can be controlled from 68 to 95 dB. The P1dB varies from - 48 to - 17 dBm, and the 3-dB bandwidth is from 32 MHz (at maximum gain of 43 dB) to 1.05 GHz (at minimum gain of - 52 dB). The VGA dissipates less than 3.6 mA from 1.8-V supply while occupying 0.4 mm2 of chip area excluding bondpads

Energy-Efficient Low-Complexity CMOS Pulse Generator for Multiband UWB Impulse Radio

This paper presents an energy-efficient low-complexity pulse-generator design technique for multiband impulse-radio ultrawide-band (IR-UWB) system in 0.18-mum CMOS technology. The short pulses are generated based on the on/off switching operation of an oscillator with subband switching functionality, which is mandatory for multiband IR-UWB systems. The relation between the oscillator switching operation and the resulting output pulse envelope, which determines pulse spectral characteristics, is analyzed, and the design guidelines for topology and component values are presented. Measurements show the output pulses with the duration of 3.5 ns, which corresponds to 520-MHz bandwidth. The output pulse spectrum centered at 3.8 GHz fully complies with the Federal Communication Commission spectral mask with more than 25 dB of sidelobe suppression without the need for additional filtering. Thus, the low-complexity pulse generator can maintain its simplicity for low cost with core chip size of 0.3 mm2. The pulse generator shows an excellent energy efficiency with average energy dissipation of 16.8 pJ per pulse from 1.5-V supply. The proposed pulse generator is best suited for energy-detection IR-UWB systems.

A burst-mode receiver for 1.25-Gb/s ethernet PON with AGC and internally created reset signal

A burst-mode receiver for 1.25 Gb/s Ethernet passive optical network (PON) systems is implemented in 0.18 /spl mu/m CMOS technology. With AGC, the receiver achieves a sensitivity of -22 dBm, overload of -3.5 dBm and loud/soft ratio of 17.5 dB. The receiver creates an internal reset signal, and all timing parameters exceed current standards.

A CMOS burst-mode optical transmitter for 1.25-Gb/s ethernet PON applications

This brief presents a CMOS burst-mode optical transmitter suitable for use in 1.25-Gb/s Ethernet passive optical network applications. Based on feedback from the monitoring photodiode, in order to control consecutive burst data the proposed transmitter in this brief uses a reset mechanism, which allows fast responses from the beginning of a high-speed input burst. The chip is fabricated in mixed-mode 0.18-/spl mu/m CMOS technology and measurements are implemented in a chip-on-board configuration using a pig-tailed type Fabry-Perot laser. Under burst-mode operation of 1.25-Gb/s pseudorandom binary sequences, measurements show about 1-dBm averaged transmitted optical power with an over 12-dB extinction ratio over a wide temperature range.

A CMOS Burst-Mode TIA with Step AGC and Selective Internally Created Reset for 1.25Gb/s EPON

A selective internal reset mechanism that allows the burst-mode TIA to recover a burst-mode signal as a stand-alone device in EPON is discussed. Using step AGC, the TIA achieves a DR of 27dB and a sensitivity of -31dBm with a PIN photodiode. Moreover, with internal reset, the loud/soft ratio is also 27dB within 100ns guard and preamble times.

Burst-mode transmitter for 1.25Gb/s Ethernet PON applications [passive optical networks]

This paper presents a burst-mode 1.25 Gb/s transmitter, suitable for use in Ethernet PON (E-PON) applications. With a burst enable signal, the transmitter proposed in this paper allows fast responses from the beginning of high-speed burst data while a conventional automatic power control circuit, based on feedback from a monitor photodiode, was used. The chip was implemented in 0.18 /spl mu/m CMOS technology and occupies an area of 0.9/spl times/0.75 mm/sup 2/ with about 260 mW power dissipation under 3.3 V supply. Measurements show a stable transmitted optical power over a wide temperature range (-40/spl deg/C to 80/spl deg/C) with above 10 dB extinction ratio.

A high linearity, efficient bandwidth, and high stability transimpedance amplifier

This paper presents a new high performance wideband CMOS transimpedance amplifier (TIA) for 2.5 Gbps optical transceiver. Our proposed TIA self-regulating adjusts the controllable inductive peeking load and feedback resistances whenever overload condition occurs. The proposed TIA design exhibits bandwidth enhancement, lower input referred noise, and higher amplifier stability. This TIA has 69 dBOmega gain at 3 dB bandwidth, 7.2 pA/radicHz input referred noise and good performance of eye diagram. The TIA operates at the 3.3 V supply voltage, and dissipates about 34 mA for whole circuit. The simulation is accomplished with 1 pF capacitance and 0.85 A/W responsibility photodiode model

Novel 1.25Gb/s CMOS burst mode optical receiver with automatically gain controllable preamplifier and high sensitive peak detector without external reset signal

This paper introduces a novel feed-forward type burst mode optical receiver, which has automatically gain controllable preamplifier and high sensitive peak detector using a 0.18mm CMOS technology. The important feature of the receiver is that it operates with a reset signal that is self-generated inside the receiver not applied externally. The designed receiver can be used in the Ethernet PON (Passive Optical Network) system and has a sensitivity of -28dBm and a overload of -8dBm at 1.25Gb/s optical input signal.

A CMOS burst-mode up-stream transmitter for fiber-optic gigabit ethernet applications

A fully integrated fiber-optic transmitter chip for gigabit Ethernet applications has been implemented in a CMOS technology. For controlling the transmitted optical power so to obtain reliable and constant averaged optical power, the transmitter proposed in this paper uses separated bias and modulation currents control circuits based on the feedback from the monitoring photo-diode (MPD). The chip was fabricated in a mixed-signal analog CMOS technology with 0.18mum gate length and measurements were implemented in a chip-on-board configuration (COB) using pig-tailed FP laser. Under the burst-mode operation of 1.25Gb/s PRBS, measurements show about 0.5dBm transmitted optical power with above 11dB extinction ratio over a wide temperature range. Based on the measurements, this work complies with the EPON IEEE P802.ah standard