R.C. Meitzler

Analog VLSI neuromorphic image acquisition and pre-processing systems

Abstract We consider the problem of automatic object recognition by small, light-weight, low power, hardware systems. We abstract from biological function and organization and propose hardware architectures and a design methodology to engineer such hardware. Robust, miniature, and energetically efficient VLSI systems for AOR can ultimately be achieved by following a path which optimizes the design at and between all levels of system integration, i.e., from devices and circuit techniques all the way to algorithms and architectural level considerations. By way of example, we discuss two experimental systems for image acquisition and preprocessing fabricated in standard CMOS processes. The first one is a large scale analog system, a contrast sensitive silicon retina, with over 590, 000 transistors operating in subthreshold CMOS. The second system is a mixed analog-digital system for image acquisition and tracking compensation that incorporates a contrast sensitive silicon retina in the image sensing area.

A silicon retina for 2-D position and motion computation

A chip which simultaneously computes image centroid and displacement from a fixed reference point was fabricated and was fully functional. Photoreceptors, image preprocessing, centroid, and displacement computations were integrated on a single die along with circuitry to generate NTSC standard video.

IRCOMM: spacecraft free-space optical bus development

This paper summarizes the on-going work at the Johns Hopkins University Applied Physics Laboratory (JHU/APL) towards implementation of a free-space optical bus for small spacecraft applications. After reviewing the current state of the art as well as previous work at JHU/APL, a comparison of several protocols, including USB, RS232, 10Mbit Ethernet (IEEE 802.3) is summarized, with Ethernet being the chosen protocol. Component selection is discussed in the context of radiation environments. Finally, a prototype point-to-point link that was assembled using COTS hardware and several different transmitting elements is described. It was found that the key technical challenge that remains is the receiver sensitivity. Plans for follow on work to complete the link are also summarized

A sampled-data motion chip

An analog CMOS VLSI prototype for a visual motion detector was fabricated and tested. This 1-D implementation computes image displacement from a fixed reference point and is suitable for eventual inclusion in an image stabilization system. The chip uses a correlation-based algorithm similar to that proposed by Reichardt (1961).<<ETX>>

A model for MOS effective channel mobility with emphasis in the subthreshold and transition region

In this work, the effects of surface potential fluctuations on the channel charge of a MOSFET are studied. By accounting for surface potential saturation, continuous models from below to above threshold are developed for the effective channel carrier concentration, the effective channel conductivity and, most importantly, the effective channel carrier mobility. The modeled mobility shows a dramatic drop-off around the threshold voltage, in agreement with experimental results. The equations developed herein may be used to improve the accuracy of existing transistor models for circuit simulation.<<ETX>>

A family of radiation tolerant ASICs for spacecraft monitoring and control operations

In this paper, we detail the design, fabrication, and test of a set of architecturally related ASICs implemented using radiation hardened by design (RHBD) techniques. The ASICs are notable for their reuse of common components and interfaces, thereby dramatically reducing design time and cost. These chips perform relatively simple functions such as data conversion, multiplexing, and digital I/O under the control of a simple I2C bus. The intended applications include spacecraft functions such as telemetry sensing and aggregation, digitally controlled potentiometers, etc. The ASICs were fabricated as part of a single reticle and each has been tested and found functional.

Power remote input output ASIC (PRIO)

The ability to monitor a variety of voltages and currents is a basic need for spacecraft and other complex systems. Although this function can be performed with a handful of components (FPGA, ADC, op-amps, etc), it is at the expense of board area, mass and power. The power remote I/O (PRIO) ASIC is a single chip, multi-channel monitoring device. The PRIO has internal buffers with externally programmable attenuation to allow the PRIO to safely monitor voltages in the range of -40 V to +40 V DC. The current monitoring is accomplished with an external toroid pickup. The ASIC operates from a 5 V supply and communicates with the spacecraft via the I2C bus

Radiation tolerant mixed signal microcontroller for Martian surface applications

We are developing a radiation tolerant, mixed-signal microcontroller for applications exposed to the Martian surface thermal environment. The part can be used for spacecraft/rover engineering data collection, parameter monitoring, and fault detection at the sensor and needs minimal external support circuits. The 8-bit microcontroller includes timer resources, three serial communications ports, a 16-bit programmable digital interface, an 8-level interrupt controller, and I 2C master/slave bus interface. Mixed signal peripherals include a 16-channel, 10-bit successive approximation A/D converter, 10-bit D/A converter, programmable gain amplifier, and voltage reference. All memory interfaces use a 13-bit wide two-bit error detection, single-bit error correction code for each byte. There is an internal 512 times 13 bit scratchpad static random access memory and 2 Ki times 13 bit electrically erasable programmable read only memory

Radiation-tolerant diffuse infrared optical backplane development

In this paper, we describe the development of a diffuse infrared optical backplane technology for small satellites. After an overview of the system architecture and previous work, we discuss the design and implementation of a radiation tolerant interface ASIC. This ASIC, which is fabricated in a silicon-on-sapphire process, contains test circuits for the interface between the photonic components (VCSEL and PiN photodiode) and the transceivers digital logic. In addition, we describe further work towards the improvement of our systems range and the creation of a fully integrated digital node

Modeling nonuniform doping in subthreshold MOSFETs

For subthreshold MOSFETs, there can be large variations in depletion region width relative to above threshold operation. This work investigates the significance of nonuniform doping effects in subthreshold conduction through numerical calculations based on measured dopant profiles. The ultimate goal of the simulations is improving the accuracy of compact MOSFET models for subthreshold circuit simulation. To this end, a semi-empirical expression suitable for inclusion in a public domain MOSFET model [the EPFL model by Enz, Krummenacher, and Vittoz (1995)] is also proposed.