R. Scholz

Novel collector design for high-speed SiGe:C HBTs

We describe a novel collector design for high-frequency SiGe:C HBTs without deep trenches and with low-resistance collectors formed by high-dose ion implantation after shallow trench formation. f/sub T/ values of 200 GHz at BV/sub CEO/=2.0 V and ring oscillator delays of 4.3 ps are obtained. Excellent static characteristics and high yield were achieved for the HBT module integrated in a 0.25 /spl mu/m CMOS platform.

A flexible, low-cost, high performance SiGe:C BiCMOS process with a one-mask HBT module

We demonstrate an extremely simple, flexible, and hence low-cost SiGe:C BiCMOS process with ample performance for the majority of high volume applications. This technology offers three HBT devices with f/sub T//BV/sub CEO/ values of 28 GHz/67 GHz/7.5 V; 52 GHz/98 GHz/3.8 V; and 75 GHz/ 90 GHz/2.4 V by adding only one mask to the underlying CMOS process.

SiGe:C BiCMOS technology with 3.6 ps gate delay

A high-speed SiGe:C HBT technology is presented that combines a new extrinsic base construction with a low-resistance collector design to simultaneously minimize base and collector resistances and base-collector capacitance. A ring oscillator delay of 3.6 ps per stage was achieved. To our knowledge, this is the shortest gate delay reported to date for a SiGe technology. The HBTs demonstrate an f/sub T/ of 190 GHz, an f/sub max/ of 243 GHz, and a BV/sub CEO/ of 1.9 V at an drawn emitter size of 0.175/spl times/0.84 /spl mu/m/sup 2/. The high-speed HBT module has been integrated in a 0.25 /spl mu/m CMOS platform.

A complementary BiCMOS technology with high speed npn and pnp SiGe:C HBTs

We demonstrate SiGe:C pnp HBTs in a complementary bipolar CMOS flow with f/sub T//f/sub max/ values of 80 GHz/120 GHz at BV/sub CEO/ = 2.6 V and a ring oscillator delay of 8.9 ps. The simultaneously fabricated npn HBTs sustain no significant performance loss compared to the npn-only BiCMOS, confirmed by f/sub T//f/sub max/ values of 180 GHz/185 GHz and a ring oscillator delay of 4.6 ps. A pnp-only BiCMOS flow produces peak f/sub T//f/sub max/ values for pnp devices of 115 GHz/115 GHz. The high speed performance of the pnp transistors surpasses the best reported values of this transistor type substantially.

BEOL embedded RF-MEMS switch for mm-wave applications

We demonstrate for the first time the embedded integration of a Radio Frequency Microelectromechanical Systems (RF-MEMS) capacitive switch for mm-wave integrated circuits in a BiCMOS Back-end-of-line (BEOL). The switch shows state-of-the-art performance parameters. The ¿off¿ to ¿on¿ capacitance ratio is 1:10 providing excellent isolation in the mm-wave frequency range. Insertion loss and isolation are found to fall below 1.65 dB and to exceed 15 dB, respectively, in the frequency range of 60 GHz to 110 GHz. Feasibility of switch integration into single chip RF designs is demonstrated for a dual-band voltage controlled oscillator (VCO). No performance degradation was observed after ten billion hot-switching cycles.

Characterization of an embedded RF-MEMS switch

An RF-MEMS capacitive switch for mm-wave integrated circuits, embedded in the BEOL of 0.25 ¿m BiCMOS process, has been characterized. First, a mechanical model based on Finite-Element-Method (FEM) was developed by taking the residual stress of the thin film membrane into account. The pull-in voltage and the capacitance values obtained with the mechanical model agree very well with the measured values. Moreover, S-parameters were extracted using Electromagnetic (EM) solver. The data observed in this way also agree well with the experimental ones measured up to 110 GHz. The developed RF model was applied to a transmit/receive (T/R) antenna switch design. The results proved the feasibility of using the FEM model in circuit simulations for the development of RF-MEMS switch embedded, single-chip multi-band RF ICs.

Robustness and reliability of BiCMOS embedded RF-MEMS switch

Robustness and reliability of an embedded RF-MEMS switch are analyzed. Changes of key switch parameters, such as COFF, CON, and pull-in voltage, with the ambient temperature are investigated in the range of −30°C to 150°C. The biggest temperature effect, a decrease by a factor of 2 between −30°C and 150°C, is observed for COFF, while CON weakly increases by only about 6% in this temperature range. For the pull-in voltage, practically no T-effect is observed. The power handling performance is also analyzed. A DC self-actuation voltage of 20V was estimated. To hold the membrane in down position, an 1.2V DC voltage drop or 15dBm RF power was found to be necessary. Finally, a new reliability test was applied, using Laser-Doppler (LD) Vibrometry technique to analyze the change in the switch dynamic behavior after billion times of operation. The measurement results show that this behavior hardly changes for up to 50 billion times operation.

High-Q passives for mm-wave SiGe applications

Deep-silicon etching technique was used for achieving high-Q inductors in a 0.25µm SiGe:C BiCMOS process. Low-resistive silicon regions under passive structures were removed using deep-silicon plasma etch technique. The lithography and etch of the silicon were performed from the backside of the wafer. Both thick (750 µm) and thin (370 µm) 8-inch wafers were processed without any handling and reliability problems. Inductors with different number of turns and values were evaluated. RF measurements were performed up to 110GHz. Performance increase of multi-turn, high value inductors was mainly limited by the inter-winding capacitance. For low value inductances, significant increase of the quality factor and self-resonance frequency was observed. The results demonstrate that the deep-silicon etching technique is an extremely suitable method for fabricating passives which exhibit low losses even at mm-wave frequencies.

A modular, low-cost SiGe:C BiCMOS process featuring high-f/sub T/ and high BV/sub CEO/ transistors

We demonstrate a BiCMOS process which uses only 22 mask steps to fabricate four types of SiGe:C HBTs, in combination with a triple-well, 2.5V CMOS core and a full menu of passive elements. Key process feature is a 2-mask HBT module. We show that transistors with peak fT values ranging from 3OGHz (@ 7V BV,) up to 130GHz (@ 2.1V BVczo) can he fabricated with this low-cost module. Among the passives are varactors, polysilicon resistors, and a 2fF/pmz MIMsapacitor. Five layers of AI are available, including 2pm and 3pm thick upper layers. SOC ability of the process is demonstrated by a 1MSRAM yield of typically 70%.

High-frequency low-noise amplifiers and low-jitter oscillators in SiGe:C BiCMOS technology

This paper describes the design of noise-critical circuits for radio-frequency and high-speed digital applications in a SiGe:C BiCMOS technology. Starting with a figure of merit for the high-frequency noise behavior of bipolar transistors, challenges in the transistor design are formulated. It is shown that the addition of carbon to the base of a SiGe-HBT results in an excellent high-frequency noise behavior of the transistors. A first design of a differential three-stage low-noise amplifier for 60 GHz applications is presented having a gain of 18 dB at 50 GHz. Furthermore, a 60 GHz voltage-controlled oscillator is presented with a phase noise of -90 dBc/Hz at 1 MHz offset from the oscillation frequency. Using a first-order PLL model, we predict an rms jitter contribution to a 5 MHz-bandwidth PLL as low as 0.4 percent of the oscillation period. Possible applications include wireless and wired broadband communication as well as automotive radar.