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Dive into the research topics where Rajasekhar Cherabuddi is active.

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Featured researches published by Rajasekhar Cherabuddi.


Archive | 1996

Low-latency, high-throughput, integrated cache coherent I/O system for a single-chip processor

Kevin Normoyle; Michael A. Csoppenszky; Jaybharat Boddu; Jui-Cheng Su; Alex S. Han; Rajasekhar Cherabuddi; Tzungren Tzeng


Archive | 2002

Dynamically allocated cache memory for a multi-processor unit

Rajasekhar Cherabuddi


Archive | 1997

Inclusion vector architecture for a level two cache

Rajasekhar Cherabuddi; Ricky C. Hetherington


Archive | 1999

Apparatus including a fetch unit to include branch history information to increase performance of multi-cylce pipelined branch prediction structures

Sanjay Patel; Adam R. Talcott; Rajasekhar Cherabuddi


Archive | 1997

Cache memory array which stores two-way set associative data

Sanjay Patel; Rajasekhar Cherabuddi; Ramesh Panwar; Adam R. Talcott


Archive | 1998

Bi-level branch target prediction scheme with fetch address prediction

Sanjay Patel; Adam R. Talcott; Rajasekhar Cherabuddi


Archive | 1996

Apparatus and method to speculatively initiate primary memory accesses

Rajasekhar Cherabuddi; Anuradha N. Moudgal; Kevin Normoyle


Archive | 2000

Method to reduce memory latencies by performing two levels of speculation

Rajasekhar Cherabuddi; Kevin Normoyle; Brian J. McGee; Meera Kasinathan; Anup K. Sharma; Sutikshan Bhutani


Archive | 1998

Method and apparatus for resolving multiple branches

Rajasekhar Cherabuddi; Sanjay Patel; Adam R. Talcott; Ramesh Panwar


Archive | 1999

DMA transfer method for a system including a single-chip processor with a processing core and a device interface in different clock domains

Kevin Normoyle; Michael A. Csoppenszky; Jaybharat Boddu; Jui-Cheng Su; Alex S. Han; Rajasekhar Cherabuddi; Tzungren Tzeng

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