Rex Lowther

On-chip interconnect lines with patterned ground shields

Measurements of on-chip interconnect lines with a patterned ground shield (PGS) are analyzed and compared to lines with no ground shield (NGS). At frequencies at and below 7 GHz, the PGS lines have about one fifth the dissipative loss of that of the NGS lines. By using a doped layer in the silicon for the shield, as opposed to other metal layers which are closer to the line, a reasonably high characteristic impedance is maintained. The transmission line characteristics are also analyzed.

Automatic grid refinement and higher order flux discretization for diffusion modeling

The authors point out that modern numerical process simulators are becoming increasingly complicated in both physical models and domain shape. Grid generation is difficult for these simulators because of the inherently transient nature of the problems being solved. Here, adaptive grid refinement is considered for use in solving diffusion problems. Higher order approximations to the discretized diffusion flux are also studied. Several methods of both adaptive grid refinement and discretization are investigated and compared in terms of CPU time and final discretization error. All the methods are directly applied to the one-dimensional version of SUPREM-IV. >

A discretization scheme that allows coarse grid-spacing in finite-difference process simulation

The central processing unit requirements of two-dimensional numerical process simulation require much larger typical grid spacings than those used in one-dimensional simulations. With these larger grid spacings, the discretization error in diffusion simulation can have a large effect on the final simulated profile. This discretization error is analyzed and a first-order correction is applied and compared to the standard discretization method. Results show that this correction allows for a significant increase in the allowed grid spacing. As a typical example, implantation and subsequent diffusion of arsenic into silicon was modeled with different grid spacings using the SUPREM-IV program (and all its default diffusion parameters) in a one-dimensional mode. In all cases, the total dose of the implant was a constant, and differences in the implantation profile width (due to the different grid spacings) were small enough to have no significant effect on the final diffused profiles. It is seen that the standard method overestimates the amount of diffusion. The proposed method shows much better agreement between the coarse and fine grids. >

Substrate parasitics and dual-resistivity substrates [microwave integrated circuits]

In high-frequency semiconductor applications, substrate effects can be a dominant source of parasitics unless they are carefully minimized. Here a dual-resistivity substrate in a bonded-oxide process is considered for the optimization of the two major types of substrate parasitics: resistive substrate losses and capacitive coupling (crosstalk) through the substrate. These will both depend on the frequency, the two substrate resistivities, and the thickness of the two substrate layers. The thickness of the upper layer is treated as a fully designable parameter. The mechanisms are evaluated numerically, but intuitive rule-of-thumb arguments are also provided for a good understanding of the physics and of the tradeoffs in selecting an optimal design. The results of these sections may also serve as a guide for determining standard substrate resistivities.

Characteristics of interconnect lines with patterned ground shields and its implication for microwave ICs

The integrated circuit interconnects are experimented with patterned ground shields (PGS) at microwave frequencies. Measurement results demonstrate that the PGS can considerably reduce the power loss at high frequencies as the PGS shields the lossy silicon substrate. Furthermore. The PGS reduces the wave length of the interconnect line as a transmission line. The reduction of the wave length has significant implications in microwave IC design as the technique can be used to shorten the transmission line length for a given electrical length.

UHF2: a 0.6-μm 25-GHz BiCMOS technology for mixed-signal wireless communications applications

A 0.6 micrometers RF BiCMOS technology was developed by the modular integration of a 25 GHz fT, 35 GHz fMAX NPN transistor and high-quality passive components into an existing 0.6 micrometers analog CMOS process. The resultant process technology supports low-cost, mixed-signal RF applications up to 2.5 GHz.

Interconnect model generation tool

This paper describes an automated interconnect model generator (IMG) tool to integrate interconnect models into an IC circuit design. This IC IMG was developed on the Harris Fastrack, which is an IC design system providing high performance tools and advanced libraries needed for integrated circuit designs. Harris Fastrack is composed of a set of Cadence core tools, Harris-developed tools and third-party tools integrated into the system. The IC IMG has a user-friendly graphic user interface (GUI) and is simple to use. It allows the user to select the interconnect lines from either layouts or schematics, then automatically creates the appropriate lumped element model and extracts the lumped element values for both the self and coupling terms.

Fast, quasi-3D modeling of base resistance for circuit simulation

Modifications are made to a finite-difference device simulator (PISCES) to model distributed base resistance. The simulator is modified to run in a quasi-3-D mode in which two numerically simulated dimensions model the lateral flow of the base current, and the third dimension is modeled with the modified Gummel-Poon (MGP) equations. The modulation of the intrinsic base sheet resistivity and the base current injection at each node are determined by the MGP model. Basewidth modulation, high injection, emitter debiasing, bias dependence of current paths, and interactions among these effects are studied for a variety of drawn geometries, sheet resistances, and temperatures. It is found that the standard models used in circuit simulation (SPICE) do not adequately model some of these effects. A model that adds an extra term into the function of base resistance is introduced to model these effects. Performing curve fits to the simulation results allows the base resistance parameters to be expressed as a polynomial sum in terms of geometry, the intrinsic and extrinsic sheet resistivities, and temperature. >

Modeling on-chip interconnect lines in RF circuits using "biointelligence"

Fully automated simulators have been quite successful at modeling on-chip interconnect in digital circuits. RF circuits, however, lend an extra set of challenges that make full automation difficult and often impractical. The need for accurate coupled inductance and substrate modeling are two of the difficulties. Furthermore, a more detailed knowledge of the circuit (such as which lines compose a differential pair) is often required. Rather than extraction from a nearly finished layout, the problem definition, in this work, starts and ends with the user. Lower level functionality is then provided to minimize the tedium, to make experimentation of the layout easier, and to help the user best understand the effect of each line and each parasitic on the circuit. As important, an equivalent compact model is provided without excessive generation time and without severely increasing the circuit simulation time.

Compact modeling of interconnect and substrate coupling at GHz frequencies

Interconnect performance can be solved to within arbitrary accuracy by numerical electromagnetic (E/M) simulation, but it is a much more challenging task to translate these results into an accurate, fast and robust lumped element model compatible for circuit simulation. The schematic is first chosen to reflect the physics as much as possible; and this helps to minimize the functional complexity of the lumped element values (parasitics). Nevertheless the parasitics still display frequency-dependences that should not be ignored. The models must be very robust to deal with the extremes of layout variations such as coupling between two metal lines that may be distant or may overlap or cross if they are on different layers. Some of the coupling parasitics can be determined with a 2-dimensional approach; but at the other extreme, substrate coupling requires a full 3-dimensional treatment. Attention must also be given to the circuit configuration of coupled lines: If each line provides the return path for the other, the current density concentrates toward the edge of the lines closest to the opposite line-significantly affecting the resistances and inductances at these frequencies. Finally there are the substrate doping and trench options that are useful depending on the situation, and these should also be modeled. A tool was developed (named HIPER) that calculates the lumped element values. HIPER is also used to calculate interactions with bond-pads (very short and fat lines) and with spiral inductors. Most models for spiral inductors assume a nearby ground, which is the case when they are measured-an assumption that can now be lifted.