Rhan Ha

Analysis of cache-related preemption delay in fixed-priority preemptive scheduling

We propose a technique for analyzing cache-related preemption delays of tasks that cause unpredictable variation in task execution time in the context of fixed-priority preemptive scheduling. The proposed technique consists of two steps. The first step performs a per-task analysis to estimate cache-related preemption cost for each execution point in a given task. The second step computes the worst case response time of each task that includes the cache-related preemption delay using a response time equation and a linear programming technique. This step takes as its input the preemption cost information of tasks obtained in the first step. This paper also compares the proposed approach with previous approaches. The results show that the proposed approach gives a prediction of the worst case cache-related preemption delay that is up to 60 percent tighter than those obtained from the previous approaches.

Validating timing constraints in multiprocessor and distributed real-time systems

In multiprocessor and distributed real-time systems, scheduling jobs dynamically on processors is likely to achieve better performance. However, analytical and efficient validation methods to determine whether all the timing constraints are met do not exist for systems using modern dynamic scheduling strategies, and exhaustive simulation and testing are unreliable and expensive. This paper describes several worst-case bounds and efficient algorithms for validating systems in which jobs have arbitrary timing constraints and variable execution times and are scheduled on processors dynamically in a priority-driven manner. The special cases of the validation problem considered here are concerned with independent jobs that are (1) preemptable and migratable, or (2) preemptable and nonmigratable, or (3) nonpreemptable.<<ETX>>

Efficient worst case timing analysis of data caching

Recent progress in worst case timing analysis of programs has made it possible to perform accurate timing analysis of pipelined execution and instruction caching. However there has not been much progress in worst case timing analysis of data caching. This is mainly due to load/store instructions that reference multiple memory locations such as those used to implement array and pointer based references. These load/store instructions are called dynamic load/store instructions and most current analysis techniques take a very conservative approach to their timing analysis. In many cases, it is assumed that each of the references from a dynamic load/store instruction will miss in the cache and replace a cache block that would otherwise lead to a cache hit. This conservative approach results in severe overestimation of the worst case execution time (WCET). The paper proposes two techniques to minimize the WCET overestimation due to such load/store instructions. The first technique uses a global data flow analysis technique to reduce the number of load/store instructions that are misclassified as dynamic load/store instructions. The second technique utilizes data dependence analysis to minimize the adverse impact of dynamic load/store instructions. The paper also compares the WCET bounds of simple benchmark programs that are predicted with and without applying the proposed techniques. The results show that they significantly (up to 20%) improve the accuracy of WCET estimation especially for programs with a large number of references from dynamic load/store instructions.

PERTS: A prototyping environment for real-time systems

PERTS is a prototyping environment for real-time systems. It contains schedulers and resource access protocols for time-critical applications, together with a comprehensive set of tools for the analysis, validation, and evaluation of real-time systems built on the scheduling paradigms supported by these building blocks. This paper describes the underlying models of real-time systems supported by PERTS, as well as its capabilities and intended use. A key component is the schedulability analyzer. The basic version of this system of tools supports the validation and evaluation of real-time systems built on the framework of the periodic-task model. This system of tools is now available.<<ETX>>

Bounding cache-related preemption delay for real-time systems

Cache memory is used in almost all computer systems today to bridge the ever increasing speed gap between the processor and main memory. However, its use in multitasking computer systems introduces additional preemption delay due to the reloading of memory blocks that are replaced during preemption. This cache-related preemption delay poses a serious problem in realtime computing systems where predictability is of utmost importance. We propose an enhanced technique for analyzing and thus bounding the cache-related preemption delay in fixed-priority preemptive scheduling focusing on instruction caching. The proposed technique improves upon previous techniques in two important ways. First, the technique takes into account the relationship between a preempted task and the set of tasks that execute during the preemption when calculating the cache-related preemption delay. Second, the technique considers the phasing of tasks to eliminate many infeasible task interactions. These two features are expressed as constraints of a linear programming problem whose solution gives a guaranteed upper bound on the cache-related preemption delay. This paper also compares the proposed technique with previous techniques using randomly generated task sets. The results show that the improvement on the worst-case response time prediction by the proposed technique over previous techniques ranges between 5 percent and 18 percent depending on the cache refill time when the task set utilization is 0.6. The results also show that as the cache refill time increases, the improvement increases, which indicates that accurate prediction of cache-related preemption delay by the proposed technique becomes increasingly important if the current trend of widening speed gap between the processor and main memory continues.

Enhanced analysis of cache-related preemption delay in fixed-priority preemptive scheduling

We propose an enhanced technique for analyzing, and thus bounding cache related preemption delay in fixed priority preemptive scheduling focusing on instruction caching. The proposed technique improves upon previous techniques in two important ways. First, the technique takes into account the relationship between a preempted task and the set of tasks that execute during the preemption when calculating the cache related preemption delay. Second, the technique considers phasing of tasks to eliminate many infeasible task interactions. These two features are expressed as constraints of a linear programming problem whose solution gives a guaranteed upper bound on the cache related preemption delay. The paper also compares the proposed technique with previous techniques. The results show that the proposed technique gives up to 60% tighter prediction of the worst case response time than the previous techniques.

Micro Sensor Node for Air Pollutant Monitoring: Hardware and Software Issues

Wireless sensor networks equipped with various gas sensors have been actively used for air quality monitoring. Previous studies have typically explored system issues that include middleware or networking performance, but most research has barely considered the details of the hardware and software of the sensor node itself. In this paper, we focus on the design and implementation of a sensor board for air pollutant monitoring applications. Several hardware and software issues are discussed to explore the possibilities of a practical WSN-based air pollution monitoring system. Through extensive experiments and evaluation, we have determined the various characteristics of the gas sensors and their practical implications for air pollutant monitoring systems.

Inertial Sensor-Based Indoor Pedestrian Localization with Minimum 802.15.4a Configuration

Available techniques for indoor object locating systems, such as inertial sensor-based system or radio fingerprinting, hardly satisfy both cost-effectiveness and accuracy. In particular, inertial sensor-based locating systems are often supplemented with radio signals to improve localization accuracy. A radio-assisted localization system is still costly due to the infrastructure requirements and management overheads. In this paper, we propose a low-cost and yet accurate indoor pedestrian localization scheme with a small number of radio beacons whose location information is unknown. Our scheme applies the Simultaneous Location and Mapping (SLAM) technique used in robotics to mobile device, which is equipped with both inertial sensors and the IEEE802.15.4a Chirp Spread Spectrum (CSS) radio, to obtain accurate locations of pedestrians in indoor environment. The proposed system is validated with real implementations. The experiment results show approximately 1.5 m mean error observed during 276 m of pedestrian moving in a 380 m2 indoor environment with five position-unknown beacons.

Energy-aware location error handling for object tracking applications in wireless sensor networks

Developing an efficient object tracking system has been an interesting challenge in wireless sensor network communities. Due to the severe resource constraints of sensor hardware, the accuracy of the tracking system could be compromised by the processing power or energy consumption. A sophisticated tracking algorithm is therefore not applicable to sensor applications, and any tracking system should explicitly consider the energy issue. In this paper, we present energy-aware location error handling techniques, namely error avoidance and error correction, to prevent and handle errors efficiently. Real situations such as an unexpected change in the mobile events direction, failure of event detection, or transmission failure of an error message are considered in the design of the proposed mechanisms. The prototype system is built with real sensor hardware, and the functionality is validated in real experiments. The experimental evaluation, together with simulation analysis, shows that the proposed mechanism saves energy while achieving good tracking accuracy.

Personalized Energy Auditor: Estimating personal electricity usage

The goal of energy monitoring and eco-feedback systems is to induce energy consumers to change their behaviors to achieve a more sustainable way of life. Comprehensive research and commercial solutions provide energy consumers with information about overall energy costs or appliance-level energy usage. However, in order to better promote spontaneous energy saving with an eco-feedback system, personalized information is required. The conventional solutions cannot identify the energy usage of an individual user in a shared residential environment. In this paper, we propose the Personalized Energy Auditor, which estimates personal energy usage at home. Our system monitors and analyzes appliance usage, as well as the energy cost of the daily activities of residents. The system then estimates personal energy usage automatically, by linking appliance usage data with the individual user. Our system was installed in residential homes, and the experimental results indicate that it accurately estimates personal energy usage.