Richard L. Lane
Rochester Institute of Technology
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Featured researches published by Richard L. Lane.
Journal of the Acoustical Society of America | 1996
Richard L. Lane
The present invention relates to a microaccelerometer employing a single free-mass and capable of measuring acceleration along three coordinate axes, and a process for fabricating through micromachining and microelectronic techniques a microaccelerometer employing a free-mass. A microaccelerometer preform is constructed by chemically coating and etching a silicon wafer to form a support member and a free-mass surrounded by the member. The free-mass is movable with respect to, but constrained by the silicon support member. Acceleration measurements are obtained by circuits which sense changes in the position of the free-mass with respect to an equilibrium position, induced by a change in the rate of acceleration of the accelerometer, and the electromagnetic force required to restore the free-mass to its equilibrium position.
Proceedings., Eighth University/Government/Industry Microelectronics Symposium | 1989
Lynn F. Fuller; K.H. Hesler; Santosh K. Kurinec; Richard L. Lane; Robert Pearson; Bruce W. Smith; I.R. Turkman
Rochester Institute of Technology, College of Engineering, has established a new master of engineering degree program in microelectronics manufacturing engineering. The program is one year (four quarters) in duration and is designed for BS graduates in engineering or science. The core courses are Microelectronics I, II, III, Microlithography I, II, and Manufacturing Science I, II. Concentration courses may be selected from a list of courses including computer integrated manufacturing, statistical design of experiments, facilities design, safety, and others. The core courses are discussed, and the facilities are described.<<ETX>>
Microelectronic Engineering | 1997
Bruce W. Smith; Zulfiqar Alam; Shahid Butt; Santosh K. Kurinec; Richard L. Lane; Graham G. Arthur
Abstract Results are presented from investigations into the UV properties of various oxide, nitride, and intermetallic materials for application as attenuated phase shift masking films for 248 and 193 nm wavelengths. There are several materials which are potential candidates as attenuating phase shifting films at short UV wavelengths. None of these, however, are elemental films or stoichiometric compounds. Non-stoichiometric alloys, cermets, and composite materials do though allow for phase shift mask solutions. Through modeling of free electron and bound electron behavior of metals, dielectrics, and semiconductors, predications can be made about the optical properties of their combinations. By adjusting the material stoichiometry through control of sputter deposition parameters, films can be tailored for specific optical applications. Through use of extinction coefficient/refractive index plots ( k-n plots), evaluation of phase shifting films is made possible. Details on four classes of materials are presented: a tantalum silicon oxide (TaSiO), an aluminum rich aluminum nitride ( Al AlN ), a molybdenum silicon oxide (MoSiO), and non-stoichiometric silicon nitride (Si x N y ). Attenuated phase shifting films have been produced based on all four classes. Optical properties and RIE etch processes for materials are compared.
Proceedings., Eighth University/Government/Industry Microelectronics Symposium | 1989
G.A. Runkle; S.P. Blondell; Lynn F. Fuller; Richard L. Lane; Robert Pearson; Bruce W. Smith; I.R. Turkham; K.H. Hesler; Santosh K. Kurinec
The authors describe the systems that have been established for the operation of the microelectronics facility at the Rochester Institute of Technology. Attention is given to the organizational structure; support facilities; cleanroom maintenance; lab equipment; equipment operation; lab supplies, inventory, and control; lab safety; and the hazardous waste program.<<ETX>>
Journal of Vacuum Science & Technology B | 1996
Bruce W. Smith; S. Butt; Z. Alam; Santosh K. Kurinec; Richard L. Lane
In order to push resolution toward diffraction limits for 248 and 193 nm lithography, it is likely that some combination of optical enhancement may be needed. The attenuated phase shift mask approach may prove to be one of the less complex techniques available. Four materials are presented which may meet optical and process requirements for use as attenuated phase shift mask films: a molybdenum silicon oxide composite, an aluminum/aluminum nitride cermet, an understoichiometric silicon nitride, and a tantalum silicon oxide composite. All of these materials are shown to be capable of 4%–15% transmission at 193 nm with thicknesses that produce a π phase shift. Evaluation of addition film properties including plasma reactive ion etch and long wavelength transmission helps in establishing materials which may be most production worthy.
biennial university government industry microelectronics symposium | 1993
Lynn F. Fuller; Robert Pearson; I.R. Turkman; Santosh K. Kurinec; Richard L. Lane; Michael Jackson; Bruce W. Smith
The microelectronic engineering program at Rochester Institute of Technology (RIT) is the only ABET accredited B.S. Microelectronic Engineering program in the United States. The program requires co-op, making it five years in length. Co-op students alternate six months of co-op employment with six months of school. Currently 250 students are in the program and more than 300 graduates are employed (mostly as process engineers) at semiconductor manufacturing locations nationwide. The undergraduate and graduate curricula are discussed. A description of the laboratory facility is included.<<ETX>>
Proceedings., Eighth University/Government/Industry Microelectronics Symposium | 1989
Richard L. Lane; D.T. Price; Bruce W. Smith; Robert Pearson; I.R. Turkman; Lynn F. Fuller
Several new processing capabilities have recently been commissioned in the RIT (Rochester Institute of Technology) microelectronic engineering laboratory. These include: (1) ion implantation; (2) LPCVD (low-pressure chemical vapor deposition) polysilicon; and (3) dry (plasma) etching. The development of these processes is part of a long-range goal to include CMOS technology in the undergraduate laboratory program. The object of this work was to develop a four-level NMOS process sequence utilizing these available processes in a way which would be suitable for an undergraduate laboratory project. The implementation of the project for a typical class is described, and some of the results and experiences are presented. A class of twenty students completed the project, including device design, wafer fabrication, and testing, in a period of six weeks, working six hours per week. Working devices were obtained, indicating that a base-line process is now available which can be optimized with further process development. The threshold voltage increased with increased implant dose, as expected.<<ETX>>
biennial university/government/industry microelectronics symposium | 2006
Santosh K. Kurinec; Lynn F. Fuller; Bruce W. Smith; Richard L. Lane; Karl D. Hirschman; Michael Jackson; Robert Pearson; Dale E. Ewbank; Sean L. Rommel; Sara Widlund; Joan Tierney; Maria Wiegand; Maureen Arquette; Charles J. Gruener; S.P. Blondell
Rochester Institute of Technology started the nations first Bachelor of Science program in Microelectronic Engineering in 1982. The program has kept pace with the rapid advancements in semiconductor technology, sharing 25 of the 40 years characterized by Moores Law. The program has constantly advanced its integrated circuit fabrication laboratory in order to graduate students with state-of-the-art knowledge, who become immediate and efficient contributors to their company or graduate program. Today, this facility serves as a key resource for research in semiconductor devices, processes, MEMS, nanotechnology, and microsystems. This has led to the creation of the first PhD program in engineering at RIT, a Doctorate in Microsystems Engineering. The department enjoys strong support from the semiconductor industry through its industrial affiliate program. Recently the department received a
biennial university government industry microelectronics symposium | 1995
Richard L. Lane; Zhong Li
1 million department level reform grant to address the imminent need for a highly educated workforce for the US high tech industry that is on the verge of nanotechnology revolution.
biennial university government industry microelectronics symposium | 1993
Richard L. Lane; Thomas J. Grimsley
A study of the parameters influencing the roughness of plasma etched surfaces of monocrystalline silicon was conducted, using a commercial reactive ion etcher (RIE) and a Gaseous Electronic Conference (GEC) Plasma Standard Cell as the etching tools. Relatively deep (6 micrometer) etching was done using pure SF/sub 6/ and mixtures of SF/sub 6/ with additions of either oxygen or hydrogen. Other parameters studied included chamber pressure and rf power. Roughness was determined qualitatively by the use of a Scanning Electron Microscope (SEM). An Atomic Force Microscope (AFM) was used on selected samples to obtain quantitative roughness measurements. A wide range of surface roughness was observed. Both pure SF/sub 6/ and SF/sub 6/ plus 7.5% H/sub 2/ mere capable of producing very smooth bottom and wall surfaces. Increasing H/sub 2/ to 17.5% caused the sidewalls to become rough while maintaining bottom smoothness. Oxygen additions caused all surfaces to be rough. With most gas compositions, surfaces could be made smoother by decreasing power and increasing pressure. Silicon etch rates generally increased with power, but showed a maximum near a pressure of 400 mT, decreasing at both higher and lower pressures. Although similar trends were observed with both etch tools, further comparisons will require a more detailed investigation.