Rod Mosely

Chemical vapor deposited TiCN: A new barrier metallization for submicron via and contact applications

High quality chemical vapor deposited (CVD) TiCN films were produced in a single wafer reactor using a metalorganic precursor (tetrakisdimethylamino titanium). The films have excellent step coverage (≳80%) over high aspect‐ratio contacts as well as a very low particle level. These properties are obtained because the films were deposited under surface‐reaction controlled conditions; the measured activation energy is 0.9 eV. The stress levels of the films are relatively low, below 5×109 dyn/cm2 compressive. The films also show good barrier properties against Al, Cu, and WF6 attack, that are attributed to their amorphous component, to the high C content of the films, and to the high step coverage. The electrical properties of the CVD TiCN films were evaluated at the via level, and the resistance contribution was shown in many cases to be comparable to that of sputtered TiN. These properties make this material a suitable barrier material for contact and via applications in sub‐0.5 μm devices.

CVD AL for advanced interconnect applications

Abstract A method for depositing low resistivity, high purity aluminum films by Chemical Vapor Deposition (CVD) is introduced. Pyrolysis of Dimethyl Aluminum Hydride (DMAH) using either H2 or an inert gas as a carrier is shown to yield films with less than 0.01 at.% carbon and oxygen and resistivities of 3.0 μΩcm. The kinetics are exponentially temperature dependent with Eact ∼ 0.5 eV independent of substrate. Introduction of some possible byproducts indicate that the deposition mechanism may be self reduction of DMAH. The morphology, wettability, and step coverage of the films are shown to depend strongly on the nature of the substrate and how it is integrated with the CVD Al process. Clustering of CVD Al with the deposition of the underlying liner is shown to be critical in achieving the highest quality films. Smooth, highly 〈111〉 oriented films with excellent reflectivity may be obtained. Some methods for Cu doping are discussed including a novel form of in situ deposition. Complete via fill is obtained with blanket depositions with one or two grains filling the vias in most cases. Vias as high as 3.5:1 aspect ratio are filled—sometimes with a single grain of Al. Electrical results indicate that the via resistances and electromigration resistance of the Al plugs are excellent.

Texture and surface morphology improvement of Al by two-stage chemical vapor deposition and its integration in an Al plug-interconnect scheme for sub 0.25 μm metallization

A two-stage deposition with successive seed and bulk deposition steps was developed to improve the morphology and texture of chemical vapor deposited (CVD) aluminum on titanium. Dimethylaluminumhydride (DMAH) was used as the precursor. Typically, CVD Al deposited using a single deposition stage showed highly granular structure with surface “defects” resulting in films that become rough with increase in thickness creating integration problems with photolithography and etch. Here, a two-stage deposition process for CVD Al is described that significantly improves the morphology and texture of Al on titanium. In this process, the wafer surface is preconditioned with a short burst of DMAH before stabilizing gas flows or pressure. Such a treatment in the very first step results in a seed layer upon which proceeds the bulk film deposition in a subsequent step after stabilizing pressure, gas flows and equilibrating temperature. The two-stage deposition resulted in reflectivity improvement of CVD Al on Ti from ⩽ 1...

A low temperature integrated aluminum metallization technology for ULSI devices

Abstract An integrated aluminum metallization process (Cool Al technology) was successfully applied to fabricate device wafers for the 0.25-μm technology. This new technology integrates CVD and PVD aluminum thin film deposition processes into a high vacuum cluster tool, the applied materials’ Endura, and is capable of reliable contact and via fills of high aspect ratio (>8:1) structures at low temperatures, typically around 330–400°C. Two different Cool Al integration sequences employing CVD TiN and Ti as liners were used to process device wafers with 0.3 and 0.4×1.2μm via structures. The fill performance and electrical and reliability characteristics of the devices were evaluated. Void-free fills of all via structures were achieved. In comparison with a standard W-plug process, both Cool Al splits show more than five times reduction in via resistance. The two Cool Al sequences yielded excellent electromigration (EM) reliability, equivalent or better than a standard W-plug process. Interestingly, the two Cool Al splits, with very different aluminum crystal textures, resulted in similar EM performance.

Planar multilevel metallization technologies for ULSI devices

Technologies are described which can completely fill contacts, vias and trenches with a PVD or CVD barrier metal film and a PVD Al-Cu plug. The presented processes are demonstrated to be applicable for contacts or vias having sizes down to 0.25 micrometers and aspect ratios of up to 5.

Chemical Vapor deposition (CVD) TiN: a barrier metallization for submicron via and contact applications

A new technique for low temperature CVD TiN is introduced as a barrier/glue layer for sub 0.5 micron applications. Excellent conformity (> 70%) is achieved while maintaining good electrical performance and reliability. The films are shown to be polycrystalline TiN with no preferred grain orientation. In addition compositional analysis shows significant amounts of carbon in the film presumably between the grains. The electrical properties of the CVD film were evaluated at the via and contact level. The contact and via resistances of tungsten plugs using CVD TiN glue layers are shown to be comparable to plugs using sputtered TiN. The barrier performance of the film was also evaluated at the contact level. The superior junction leakage data indicate that the CVD TiN film should have wide application as a barrier metal for sub 0.5 mm applications.

Ultrathin integrated ion metal plasma titanium and metallorganic titanium nitride liners for sub 0.18 μm W based metallization schemes for >500 MHz microprocessors

This study will specifically address the results of integrating IMP Ti and MOCVD TiN on a high vacuum system. Results of design of experiments used for process characterization and optimizing device parametric such as contact and via resistance will be discussed, in particular with respect to unlanded via schemes. Finally, Cost of Ownership calculations will be presented in comparison to conventional PVD technologies. In summary, the integration of IMP Ti and MOCVD TiN enables the deposition of a highly cost effective, low resistivity, ultra-thin, and low- temperature liners for sub 0.18 micrometers technology node thereby enabling > 500 MHz microprocessor technology.

Integrated IMP Ti and MOCVD TiN for 300-mm W barrier and liner for sub-0.18-μm IC processing

The combination of IMP Ti and CVD TiN is well established for use as W-adhesion films for 200 mm wafers. The advantage of this unique PVD/CVD integrated solution provides the superior Ti bottom coverage by IMP Ti and conformal TiN coverage from MOCVD TiN. A 300 mm liner and barrier system with integrated IMP Ti, MOCVD TiN has also been developed on Endura mainframe. Scale-up to 300 mm poses several unique challenges to both CVD and PVD processes. Additionally, since 300 mm processing will likely be implemented at sub 0.18 micrometers mode, ultra-thin liners will be required for superior device performance. This paper discusses the process characterization of the 300 mm IMP Ti and MOCVD TiN for thin films (<200 A Ti and <100 A TiN). The Rs and Rs uniformity of 300 mm IMP Ti and CVD TiN were shown to be comparable with the results achieved for 200 mm. Laser acoustic wave spectrometry measurement of thickness and thickness uniformity of ultra-thin Ti (50 A) and TiN (50 A) will also be presented. Cross sectional TEM study shows superior Ti bottom coverage and conformal TiN coverage were also achieved with the integrated 300 mm IMP Ti/CVD TiN process. Process stability was demonstrated with 250-wafer run. The process results of 300 mm Ar sputtering preclean and degas will also be presented in the paper.

Etch/metallization process sequence integration-impact of Al texture on Al etch performance

Very successful process sequence integration has been demonstrated with Al etch/CVD/PVD-Al deposition. For CVD-Al with poor Al(111) texture, Al sidewall attack occurs at the CVD-Al/TiN-barrier interface. However, with a thin Ti layer on top of the CVD-TiN film, excellent CVD-Al(111) texture is produced without Al sidewall attack. Furthermore, Cu residue performance of CVD/PVD-Al-1.0%Cu is observed to be quite similar to that on PVD-Al-0.5%Cu. The impact of oxide substrate material on Al etch performance is also addressed.

Coherent TiN Diffusion Barriers for Sub-0.5 μm Planarized AL Technology

This paper describes in situ post deposition treatment technologies to fortify the coherent PVD TiN barrier so that it will withstand the high temperature (> 450 ° C) Al deposition or flow process for sub-0.5 μm planarized Al technology. The coherent PVD TiN barriers were sputtered under 3 different pressure conditions and subsequently heat treated for fortification. Such heat treated, fortified PVD TiN barriers exhibit low reactivity with Al, which is illustrated by the minimal sheet resistance increase in TiN/Al thin film stacks during the heat treatment. Furthermore, optical and SEM inspection on the silicon surface show no pitting. Leakage current of less than 50 pA has been obtained on 10K-contact chains of sub-0.5 (μm devices using a vacuum integrated coherent Ti/fortified PVD TiN/planarized Al process. This development has led to a completely vacuum integrated sub-0.5 μm PVD Al plug fill process.