Nitin Khurana

Ultrathin integrated ion metal plasma titanium and metallorganic titanium nitride liners for sub 0.18 μm W based metallization schemes for >500 MHz microprocessors

This study will specifically address the results of integrating IMP Ti and MOCVD TiN on a high vacuum system. Results of design of experiments used for process characterization and optimizing device parametric such as contact and via resistance will be discussed, in particular with respect to unlanded via schemes. Finally, Cost of Ownership calculations will be presented in comparison to conventional PVD technologies. In summary, the integration of IMP Ti and MOCVD TiN enables the deposition of a highly cost effective, low resistivity, ultra-thin, and low- temperature liners for sub 0.18 micrometers technology node thereby enabling > 500 MHz microprocessor technology.

Integrated IMP Ti and MOCVD TiN for 300-mm W barrier and liner for sub-0.18-μm IC processing

The combination of IMP Ti and CVD TiN is well established for use as W-adhesion films for 200 mm wafers. The advantage of this unique PVD/CVD integrated solution provides the superior Ti bottom coverage by IMP Ti and conformal TiN coverage from MOCVD TiN. A 300 mm liner and barrier system with integrated IMP Ti, MOCVD TiN has also been developed on Endura mainframe. Scale-up to 300 mm poses several unique challenges to both CVD and PVD processes. Additionally, since 300 mm processing will likely be implemented at sub 0.18 micrometers mode, ultra-thin liners will be required for superior device performance. This paper discusses the process characterization of the 300 mm IMP Ti and MOCVD TiN for thin films (<200 A Ti and <100 A TiN). The Rs and Rs uniformity of 300 mm IMP Ti and CVD TiN were shown to be comparable with the results achieved for 200 mm. Laser acoustic wave spectrometry measurement of thickness and thickness uniformity of ultra-thin Ti (50 A) and TiN (50 A) will also be presented. Cross sectional TEM study shows superior Ti bottom coverage and conformal TiN coverage were also achieved with the integrated 300 mm IMP Ti/CVD TiN process. Process stability was demonstrated with 250-wafer run. The process results of 300 mm Ar sputtering preclean and degas will also be presented in the paper.

Etch/metallization process sequence integration-impact of Al texture on Al etch performance

Very successful process sequence integration has been demonstrated with Al etch/CVD/PVD-Al deposition. For CVD-Al with poor Al(111) texture, Al sidewall attack occurs at the CVD-Al/TiN-barrier interface. However, with a thin Ti layer on top of the CVD-TiN film, excellent CVD-Al(111) texture is produced without Al sidewall attack. Furthermore, Cu residue performance of CVD/PVD-Al-1.0%Cu is observed to be quite similar to that on PVD-Al-0.5%Cu. The impact of oxide substrate material on Al etch performance is also addressed.