Roger Cornell

Three-dimensional top-down metrology: a viable alternative to AFM or cross-section?

Automated critical dimension (CD) metrology has long been known to have certain limitations. As a top down imaging technique, retrograde profiles, resist thickness loss and other process issues are difficult to detect with the standard production CD SEMs used throughout the industry. Tilting capability has recently added much needed degrees of freedom to CD SEMs, potentially opening the door to three dimensional metrology. Various methodologies can be used to interpret tilt image information. This paper investigates one particular technique used to extract three dimensional information. Using cross section and/or atomic force microscopy (AFM), one can evaluate the potential benefits and validity of CD SEM tilt capability. Sidewall angle, film thickness and possibly other parameters could possibly become standard calculations the top down CD SEM could perform on a routine basis. Data is reported comparing 3D information generated from top down CD SEM to AFM. Potentially, a couple of different approaches to evaluating 3D information will be compared. Lastly, recommendations for future applications will be discussed.

Characterizing and understanding stray tilt: the next major contributor to CD-SEM tool matching

Measurement using electron beam tilt has recently been highlighted as holding the promise of future sidewall angle and thickness determinations in the CD SEM in a manufacturing environment. But even before robust tilted beam measurements can be made, a thorough understanding of stray tilt, its characterization and control, is needed to provide the foundation for tilt calibrations and measurements. Stray tilt is the amount of unintended angular deviation of the electron beam from the normal to the specimens (wafer) surface. Stray tilt is common to all SEMs used in manufacturing due to the following contributors: mechanical tolerances, acting both within the SEM column and between the SEM column and the chamber and the sample holder; and also residual and parasitic magnetic and electrostatic fields - these fields are generated both within and outside of the SEM integrated stand-alone unit. Past characterization attempts addressed this issue through an asymmetry specification. Recent data has suggested that stray tilt errors can have significant negative effects on todays critical dimension measurements, especially on a fleet of CD SEM tools with different amounts of stray tilt. This paper explores the measurement, monitoring and minimizing of stray tilt and the consequences on tool matching.

Buckling characterization of gate all around silicon nanowires

Imaging of suspended silicon nanonwires (SiNW) by SEM reveals that some of the SiNW are buckled. Buckling can impact device performance and it is therefore important to characterize this phenomenon. Measuring the buckling of suspended silicon nanowires (SiNW) poses significant challenges: (1) Small dimensions - SiNW are made with diameters ranging from about 3 to 10 nm and the buckling is of a similar scale. (2) Accurate height measurements – buckling is a three dimensional phenomena. To meet these challenges a new height map reconstruction technique was introduced, using the CDSEM side detectors signal. Measuring pixel by pixel position in X, Y and Z (height) dimensions, we can obtain the buckling vector gradient along the wire in three dimensions. In this paper we present: (1) A description of the height map reconstruction technique used. (2) Three dimensional characterization of SiNW: (a) SiNW buckling measurements (b) Characterization of buckling as a function of the SiNW length and width.

CDSEM focus/dose monitor for product applications

Advanced 193 nm lithographic processes will require defocus control for product wafers in order to meet CD and profile requirements in the future. Dose control is already required. The interaction of product wafer materials with lithography requires additional controls beyond tool monitoring. While scatterometry has demonstrated excellent ability to extract effective defocus and dose information from monitor wafers, the addition of product film stacks introduces several issues for this technique. The additional complexity of model generation and the sensitivity to under-layer thickness and optical property variation are among these. A CDSEM technique for lithography focus monitoring overcomes these issues provided it has sufficient precision and relative accuracy. In this paper, we report on comparative studies of two CDSEM techniques. One technique uses angled e-beam to better view the sidewall for edge width measurement. The angle of the beam from normal incidence is considerably larger than previously explored thereby enabling sensitive measurements on shallower structures. The other technique introduces new target designs particularly suited to CDSEM measurement that have enhanced sensitivity to focus and dose. Implementation of these techniques requires expanded sampling during the course of a single measurement in order to suppress roughness. The small target size of these structures enables applications with targets in product kerf and embedded within the circuit. In summary, these methods enable the measurement of dose and focus variations on product wafers.

CDSEM AFM hybrid metrology for the characterization of gate-all-around silicon nano wires

In an ongoing study of the physical characterization of Gate-All-Around Silicon Nano Wires (GAASiNW), we found that the thin, suspended wires are prone to buckling as a function of their length and diameter. This buckling takes place between the fixed source and drain regions of the suspended wire, and can affect the device performance and therefore must be studied and controlled. For cylindrical SiNW, theory predicts that buckling has no directional preference. However, 3D CDSEM measurement results indicated that cylindrical wires prefer to buckle towards the wafer. To validate these results and to determine if the electron beam or charging is affecting our observations, we used 3D-AFM measurements to evaluate the buckling. To assure that the CDSEM and 3D-AFM measure the exact same locations, we developed a design based recipe generation approach to match the 3D-AFM and CDSEM coordinate systems. Measuring the exact same sites enables us to compare results and use 3D-AFM data to optimize CDSEM models. In this paper we will present a hybrid metrology approach to the characterization of GAASiNW for sub-nanometer variations, validating experimental results, and proposing methods to improve metrology capabilities.

Leveraging applied materials TechEdge Prizm™ for advanced lithography process control

Presently the CDSEM metrology tool continues to be the “ruler of the fab” providing metrology at over 100 steps along the way to building a modern semiconductor product. We explore the history of data volume generated with Fab CDSEM fleets. As we quantify the size of the fleet dataset, it becomes clear why historically only a subset of the rich dataset is ever utilized. We review what the treatment of the data using modern “big data” analytics and enterprise level server hardware does to accelerate development learning, increase engineering turns per day and raise the velocity of accurate manufacturing feedback. This paper further explores ways to leverage TechEdge Prizm to extract more value out of metrology for Lithography process control. The paper will describe some of the challenges facing the changing Lithography metrology landscape and how Prizm delivers tailored analysis for these challenges. Results at a customer site demonstrate that various types of analysis of CDSEM images and data are 10 times more efficient and thorough than traditional methods.

New techniques in large scale metrology toolset data mining to accelerate integrated chip technology development and increase manufacturing efficiencies

Today, metrology toolsets report out more information than ever. This information applies not only to process performance but also metrology toolset and recipe performance through various diagnostic metrics. This is most evident on the Critical Dimension Scanning Electron Microscope (CD-SEM). Today state of the art CD-SEMs report out over 250 individual data points and several images per measurement. It is typical for a state of the art fab with numerous part numbers to generate at least 20TB of information over the course of a year on the CD-SEM fleet alone pushing metrology toolsets into the big data regime. Most of this comes from improvements in throughput, increased sampling and new data outputs relative to previous generations of tools. Oftentimes, these new data outputs are useful for helping to determine if the process, metrology recipe or tool is deviating from an ideal state. Many issues could be missed by singularly looking at the key process control metric like the bottom critical dimension (CD) or a small subset of this available information. By leveraging the entire data set the mean time to detect and finding the root cause of issues can be significantly reduced. In this paper a new data mining system is presented that achieves this goal. Examples are shown with a focus on the benefits realized using this new system which helps speed up development cycles of learning and reducing manufacturing cycle-time. This paper concludes discussing future directions to make this capability more effective.

Embedded charge investigation: industry concerns and metrology solutions

As described by the ITRS roadmap [1], introduction of next generation processes in semiconductor fabrication continually requires tighter control in order to insure optimal device characteristics. Recent process development has shown an increased amount of charged layers, which in turn affects the inline critical dimension scanning electron microscopes (CD-SEM) ability to generate quality measurements thereby impacting process control. This paper reports on the investigation of techniques to measure and compensate for this charge dynamically to yield quality measurements. New capabilities of the CD-SEM were evaluated and tested at various process steps including processing steps not measured by the CD SEM. This capability not only means the CD-SEMs are essentially immune to charged layer affects but the capability can also be used to feedback to other tool-sets suspected of causing the charge build-up. These charge measurements help provide an understanding on how the device performance might be impacted. In order to establish charged wafer monitoring in the future along with feedback loops, studies of the reproducibility and the persistency of the charge across sequential processes in the back-end layers have been made. Studies were also conducted to determine the origin of the charge by observing the distribution before and after known problematic process steps.