Roman Iwanczuk

Configurable logic element with ability to evaluate five and six input functions

Method and system for generating a programming bitstream including identification bits

FPGA configurable by two types of bitstreams

Structure and method for loading narrow frames of data from a wide input bus

Structure and method for loading wide frames of data from a narrow input bus

FPGA having fast configuration memory data readback

Configurable logic element with ability to evaluate wide logic functions

Wide logic gate implemented in an FPGA configurable logic element

Multiplexer for implementing logic functions in a programmable logic device

Multiplexer array with shifted input traces