Roman Riederer

Fast transient response capacitor-free linear voltage regulator in 65nm CMOS

A fast transient response capacitor-free linear voltage regulator is presented. It provides an output voltage of 1.2V for supplying a digital signal processor with a load current of up to 200mA. The regulator incorporates both high static output voltage accuracy of better than 1% for six sigma design and fast transient response. A load jump from 1mA to 150mA with a rise time of 100ns causes an undershoot of only 90mV. The voltage regulator is implemented in a 65nm CMOS process. Because no external capacitor is required the proposed regulator is well suited for System on Chip designs.

A digitally controlled linear voltage regulator in a 65nm CMOS process

This paper presents a fully digitally controlled low dropout linear voltage regulator (LDO). It is implemented in a 65 nm low power CMOS process. The input voltage range covers 3 V to 5 V while the output voltage is 2.87 V with a nominal load of 150 mA. The digital controller was implemented using VHDL, automated synthesis- and place & route tools. The synchronous controller is assisted by an asynchronous gain adjustment circuit. It will be shown, that the proposed LDO can compete with the performance of analog solutions and at the same time it can exploit the advantages of its digital implementation.

Capacitor-less LVR for a 32-bit automotive microcontroller SoC in 65nm CMOS

In this paper an output capacitor-less linear voltage regulator (LVR) for very fast load transients of up to 100mA/10ns is proposed. The LVR is designed for providing the core voltage supply of a microcontroller (μC) system in an automotive environment. It makes use only of the load capacitance of the μC core without any additional buffer capacitor. The target supply voltage ranges from 2.97V to 5.5V while the output voltage is 1.3V. The maximum load current is 200mA while consuming 176μA quiescent current. A test chip of the LVR was fabricated in a 65nm digital CMOS process and the measurement results are presented.