Ru Huang

A New Dynamic Selector Based on the Bipolar RRAM for the Crossbar Array Application

Crossbar array architecture is usually used for the high-density integration of the RRAM device. However, the large sneak current in the passive crossbar array limits the increase in the integration density. In this brief, the bipolar TiN/TaOx/Pt RRAM device is proposed as the dynamic selector for the unipolar Pt/TaOx/Pt RRAM device to suppress the sneak current in the crossbar array. The testing results show that the bipolar RRAM can act as a good selector, and the sneak current is reduced by about two orders estimated by the 1/2 Vread voltage scheme. With the suppressed sneak current, the maximum size of the crossbar array with the bipolar RRAM selector can be increased to more than 1 Mb according to the simulation results, indicating that the bipolar RRAM selector has great potential for the high-density memory applications.

Novel Vertical 3D Structure of TaOx-based RRAM with Self-localized Switching Region by Sidewall Electrode Oxidation

A novel vertical 3D RRAM structure with greatly improved reliability behavior is proposed and experimentally demonstrated through basically compatible process featuring self-localized switching region by sidewall electrode oxidation. Compared with the conventional structure, due to the effective confinement of the switching region, the newly-proposed structure shows about two orders higher endurance (>108 without verification operation) and better retention (>180h@150u2009°C), as well as high uniformity. Corresponding model is put forward, on the base of which thorough theoretical analysis and calculations are conducted as well, demonstrating that, resulting from the physically-isolated switching from neighboring cells, the proposed structure exhibits dramatically improved reliability due to effective suppression of thermal effects and oxygen vacancies diffusion interference, indicating that this novel structure is very promising for future high density 3D RRAM application.

Record Low-Power Organic RRAM With Sub-20-nA Reset Current

In this letter, organic resistive random access memory (RRAM) devices based on double-layer polychloro-para-xylylene (parylene-C) are fabricated, which show stable bipolar resistive switching behavior, excellent data retention, and high scalability. Moreover, extremely low reset current of sub-20 nA and set current of 0.15 μA are obtained with adequate switching margin for the first time in the field of organic RRAM, almost 105 times lower than that of the single-layer parylene-C cells, exhibiting great potentials for future low-power applications. Possible mechanism for the ultralow operating current of double-layer device is discussed.

Two-bit memory devices based on single-wall carbon nanotubes: demonstration and mechanism

Two-bit memory devices of SWNTs, based on the hysteresis effect, have been demonstrated for the first time. The pertinent memory behaviours seem to originate from the capacitive effect due to polarization of molecules, especially the surface-bound water molecules on SiO2 in close proximity to carbon nanotubes. Our investigations are intimately linked with ultrahigh-density memory applications, and possibly go a long way in broadening the memory applications of SWNTs, for example from nonvolatile to volatile cells.

A flexible organic resistance memory device for wearable biomedical applications

Parylene is a Food and Drug Administration (FDA)-approved material which can be safely used within the human body and it is also offers chemically inert and flexible merits. Here, we present a flexible parylene-based organic resistive random access memory (RRAM) device suitable for wearable biomedical application. The proposed device is fabricated through standard lithography and pattern processes at room temperature, exhibiting the feasibility of integration with CMOS circuits. This organic RRAM device offers a high storage window (>10(4)), superior retention ability and immunity to disturbing. In addition, brilliant mechanical and electrical stabilities of this device are demonstrated when under harsh bending (bending cycle >500, bending radius <10 mm). Finally, the underlying mechanism for resistance switching of this kind of device is discussed, and metallic conducting filament formation and annihilation related to oxidization/redox of Al and Al anions migrating in the parylene layer can be attributed to resistance switching in this device. These advantages reveal the significant potential of parylene-based flexible RRAM devices for wearable biomedical applications.

Analytical model of three-dimensional effect on voltage and edge peak field distributions and optimal space for planar junction with a single field limiting ring

Abstract An analytical model of the three-dimensional (3-D) effect due to the lateral radius of the main junction and width of the ring junction on voltage and edge peak field profiles for the planar junction with a single floating electrical field limiting ring structure have been proposed for the first time. From this model analysis, the influence on the voltage and edge peak field of the reverse voltage, 3-D factors such as lateral curvature of the main junction and width of the ring junction, space distance between the main junction and ring junction and junction depth are analyzed, and then the expressions for predicting the optimal space and maximum breakdown voltage are also obtained. The analytical results are in agreement with the previous numerical analysis.

Encapsulation layer design and scalability in encapsulated vertical 3D RRAM

Here we propose a novel encapsulated vertical 3D RRAM structure with each resistive switching cell encapsulated by dielectric layers, contributing to both the reliability improvement of individual cells and thermal disturbance reduction of adjacent cells due to the effective suppression of unwanted oxygen vacancy diffusion. In contrast to the traditional vertical 3D RRAM, encapsulated bar-electrodes are adopted in the proposed structure substituting the previous plane-electrodes, thus encapsulated resistive switching cells can be naturally formed by simply oxidizing the tip of the metal bar-electrodes. In this work, TaO x -based 3D RRAM devices with SiO2 and Si3N4 as encapsulation layers are demonstrated, both showing significant advantages over traditional unencapsulated vertical 3D RRAM. Furthermore, it was found thermal conductivity and oxygen blocking ability are two key parameters of the encapsulation layer design influencing the scalability of vertical 3D RRAM. Experimental and simulation data show that oxygen blocking ability is more critical for encapsulation layers in the relatively large scale, while thermal conductivity becomes dominant as the stacking layers scale to the sub-10 nm regime. Finally, based on the notable impacts of the encapsulation layer on 3D RRAM scaling, an encapsulation material with both excellent oxygen blocking ability and high thermal conductivity such as AlN is suggested to be highly desirable to maximize the advantages of the proposed encapsulated structure. The findings in this work could pave the way for reliable ultrahigh-density storage applications in the big data era.

Microscopic origin of read current noise in TaOx-based resistive switching memory by ultra-low temperature measurement

TaOx-based resistive random access memory (RRAM) attracts considerable attention for the development of next generation nonvolatile memories. However, read current noise in RRAM is one of the critical concerns for storage application, and its microscopic origin is still under debate. In this work, the read current noise in TaOx-based RRAM was studied thoroughly. Based on a noise power spectral density analysis at room temperature and at ultra-low temperature of 25u2009K, discrete random telegraph noise (RTN) and continuous average current fluctuation (ACF) are identified and decoupled from the total read current noise in TaOx RRAM devices. A statistical comparison of noise amplitude further reveals that ACF depends strongly on the temperature, whereas RTN is independent of the temperature. Measurement results combined with conduction mechanism analysis show that RTN in TaOx RRAM devices arises from electron trapping/detrapping process in the hopping conduction, and ACF is originated from the thermal activatio...

Predictive modeling of capacitance and resistance in gate-all-around cylindrical nanowire MOSFETs for parasitic design optimization

This paper presents a predictive electrostatic capacitance and resistance compact model of multiple gate MOSFET with cylindrical conducting channels, taking into account parasitic effects, quantum confinement and quasi-ballistic effects. The model incorporates the dependence of channel length, gate height and width, gate-to-contact spacing, nanowire size, multiple channels, as well as 1-D ultra-narrow source/drain extension (SDE) doping profile. The proposed non-iterative electrostatic model is successfully verified, and can be used to predict nanowire-based circuit performance. Based on the analytical model, we can further examine which parasitic components are affecting the delay. Results revealed that Cside, Cof, Rsd, RQ are dominant factors and should be treated as a major design concern. Among all the parameters, Lsd, Tg and Ndop are essentially important in parasitic design optimization. By selectively modifying these parameters, parasitic effect is evidently reduced.

Analog Circuit Applications Based on Ambipolar Graphene/MoTe2 Vertical Transistors

The current integrated circuit (IC) technology based on conventional MOS-FET (metal-oxide-semiconductor field-effect transistor) is approaching the limit of miniaturization with increasing demand on energy. Several analog circuit applications based on graphene FETs have been demonstrated with less components comparing to the conventional technology. However, low on/off current ratio caused by the semimetal nature of graphene has severely hindered its practical applications. Here we report a graphene/MoTe2 van der Waals (vdW) vertical transistor with V-shaped ambipolar field effect transfer characteristics to overcome this challenge. Investigations on temperature dependence of transport properties reveal that gate tunable asymmetric barriers of the devices are account for the ambipolar behaviors. Furthermore, to demonstrate the analog circuit applications of such vdW vertical transistors, we successfully realized output polarity controllable (OPC) amplifier and frequency doubler. These results enable vdW heterojunction based electronic devices to open up new possibilities for wide perspective in telecommunication field.