Yunyi Fu

Brilliant and tunable color of carbon-coated thin anodic aluminum oxide films

When a thin anodic aluminum oxide (AAO) film on an Al substrate is uniformly coated with carbon by chemical vapor deposition, the saturation of interference color is substantially enhanced and, as a result, the coated AAO film exhibits a brilliant color. Such remarkable saturation enhancement is predominantly due to the carbon deposited on the inner walls of nanochannels of the AAO film, which efficiently screens the reflected light from AAO–Al interface. The brilliant carbon-coated AAO film is useful for weather-resistant decorative purposes and holds promise as an effective broadband optical limiter for nanosecond laser pulse.

Electromigration Studies of Cu/Carbon Nanotube Composite Interconnects Using Blech Structure

The electromigration (EM) properties of pure Cu and Cu/carbon nanotube (CNT) composites were studied using the Blech test structure. Pure Cu and Cu/CNT composite segments were subjected to a current density of 1.2 times 106 A/cm2. The average void growth rate of Cu/CNT composite sample was measured to be around four times lower than that of the pure copper sample. The average critical current-density-length threshold products of the pure Cu and Cu/CNT composites were estimated to be 1800 and 5400 A/cm, respectively. The slower EM rate of the Cu/CNT composite stripes is attributed to the presence of CNT, which acts as trapping centers and causes a decrease in the diffusion of EM-induced migrating atoms.

Copper/carbon nanotube composite interconnect for enhanced electromigration resistance

Bottom-up growth of carbon nanotubes (CNTs) and electrochemical plating approaches were combined to produce homogeneous copper/CNT composite. The measured resistivity of the copper/CNT composite at room temperature was 2.2 muOmegaldr cm. The electrical resistivity of copper/CNT composite at room temperature increases slightly with the increasing loading of the CNTs in the copper matrix. From room temperature to 350degC, all the composites exhibit the typical metallic increase of the electrical resistivity. Conventional Blech-Kinsbron test structure were fabricated and used to characterize the electromigration (EM) induced void growth rate. EM comparison testing of Cu and Cu/CNT composites were carried out over temperature range of 100 to 250degC and current density from 5 times 105 to 2 times 106 A/cm2. The void growth rate for the Cu/CNT composite stripe was measured and found to be around four times lower than that of the pure Cu stripe. The result suggests that Cu/CNT composite is potentially a good candidate for advanced integrated circuit interconnect application where both lower electrical resistivity and better EM resistance are required.

Two-bit memory devices based on single-wall carbon nanotubes: demonstration and mechanism

Two-bit memory devices of SWNTs, based on the hysteresis effect, have been demonstrated for the first time. The pertinent memory behaviours seem to originate from the capacitive effect due to polarization of molecules, especially the surface-bound water molecules on SiO2 in close proximity to carbon nanotubes. Our investigations are intimately linked with ultrahigh-density memory applications, and possibly go a long way in broadening the memory applications of SWNTs, for example from nonvolatile to volatile cells.

Toward High Carrier Mobility and Low Contact Resistance: Laser Cleaning of PMMA Residues on Graphene Surfaces

Poly(methyl methacrylate) (PMMA) is widely used for graphene transfer and device fabrication. However, it inevitably leaves a thin layer of polymer residues after acetone rinsing and leads to dramatic degradation of device performance. How to eliminate contamination and restore clean surfaces of graphene is still highly demanded. In this paper, we present a reliable and position-controllable method to remove the polymer residues on graphene films by laser exposure. Under proper laser conditions, PMMA residues can be substantially reduced without introducing defects to the underlying graphene. Furthermore, by applying this laser cleaning technique to the channel and contacts of graphene field-effect transistors (GFETs), higher carrier mobility as well as lower contact resistance can be realized. This work opens a way for probing intrinsic properties of contaminant-free graphene and fabricating high-performance GFETs with both clean channel and intimate graphene/metal contact.Graphical Abstract

Directly synthesizing CNT-TIM on aluminum alloy heat sink for HB-LED thermal management

Vertically aligned carbon nanotube (VACNT) arrays were synthesized directly on aluminum alloy substrates by thermal chemical vapor deposition (CVD). Iron nitrate (Fe(NO3)3ldr9H2O) was used as the catalyst. Parameters influencing CNT synthesis were studied and optimized. Several surface treatment methods were proposed to improve the quality of CNTs synthesized on aluminum alloy substrates. The grown CNT arrays were used as thermal interface material (TIM) while the aluminum alloy substrate used as the heat sink in high brightness LED packages. The measured thermal resistance of the grown CNT-TIM was 38 mm2-K/W. The output light power testing demonstrated CNT-TIM is an attractive thermal management solution for HB- LED packages.

Low insertion loss of 200 μm-long graphite coplanar waveguide

The graphene coplanar waveguide (CPW) has recently been found to have large insertion loss (typically larger than 50 dB/100 μm), which mainly results from the large resistance of graphene. The poor radio-frequency transmission property of graphene hampers its application in interconnect, a low loss material is thus required. In this paper, low-resistance graphite CPWs with effective graphite length up to 200 μm were fabricated. A record low insertion loss of graphite CPW (2.76 dB/100 μm) is demonstrated, and the average insertion loss of our graphite CPWs is only ∼1/5 of that of our monolayer graphene CPWs. Moreover, we find the insertion loss of graphite CPW may be even smaller at higher frequencies. Our investigation shows that graphite is a possible candidate for interconnect and may even be more applicable at ultra-high frequencies.

Fabrication of silver nanowires in situ in Si chip based on a novel electrochemical method

In this paper, we report a novel electrochemical deposition (ECD) method to fabricate silver nanoscale wires and dendrites. We carry out the electrochemical deposition (ECD) process on a small piece of Si wafer. On its surface, there are micro-scale predefined silver electrodes. We use organic solution (N,N-dimethylformamide (DMF)) instead of metal salt solution as the electrolyte. Usually the fractal structures can be formed in the electrochemical deposition (ECD) process. When an external resistor is introduced in the ECD circuit, instead of fractal structures, silver nanoscale wires and dendrites can be obtained between two electrodes in situ in the Si chip. The diameters of the silver nanowires are about 40-200 nm and the electric properties of the silver nanowire with a diameter about 100 nm have been measured. We have proposed a possible formation mechanism for these silver nanoscale wires and dendrites.

Field-effect transistors based on single-wall carbon nanotubes bundles

The electric transport properties of single-walled carbon nanotubes (SWNT) bundles array have been measured. We report the fabrications and performances of nanoscale field-effect transistors (FET) based on SWNT bundles array. In addition to p-type FET, we present a new technique by which ambipolar FETs can be fabricated. The I/sub on// I/sub off/ ratio of ambipolar FETs approaches 5 orders of magnitude. The reasons for ambipolar character are also qualitatively discussed. Both p-type and ambipolar FETs exhibit hysteresis in their electrical characteristics.

Synthesis of highly uniform monolayer graphene by etching the multilayer spots for electronic devices

We demonstrate a facile method to grow highly uniform monolayer graphene films on copper foils by atmospheric pressure chemical vapor deposition (APCVD). The technique in this method includes lowering flow ratio of methane/hydrogen and extending exposure time to hydrogen. All the multilayer islands will be etched away by hydrogen during this growth process, resulting in obtaining highly uniform monolayer graphene. A mechanism for the suppression of mutilayer spots based on the etching effect of hydrogen is proposed. The electron and hole room-temperature mobilities for the back-gated graphene transistors are up to about 3800 cm2V−1s−1 and 3300 cm2V−1s−1, respectively.