Run Chen

Study on the Reliability of Application-Specific LED Package by Thermal Shock Testing, Failure Analysis, and Fluid–Solid Coupling Thermo-Mechanical Simulation

Reliability is essential for large-scale applications of high-power light-emitting diode (LED) devices, modules, and systems for general illumination. In this paper, the reliability of a novel application-specific LED package (ASLP) is investigated by thermal shock testing, failure analysis, and fluid-solid coupling thermo-mechanical simulation. The reliability of the ASLP modules was validated with a dual-bath liquid thermal shock testing from 233 to 398 K. The non-destructive failure analysis was conducted to the catastrophic failure ASLP samples by fluorescent penetrant inspection. The delaminations at the interfaces within the ASLP module were detected. The failure mechanisms were identified by digital optical microscopy and field emission scanning electron microscope inspection after the decapsulation. The experimental results show that fracture failure occurs at the wedge joint of the bonding wire, which leads to the catastrophic failure of the ASLP module. The stress and strain behaviors of the ASLP module, especially the bonding wire under thermal shock loading, were analyzed through thermo-mechanical modeling with the nonlinear time- and temperature-dependent material properties. Significant thermal gradient within the ASLP module during the thermal shock testing was taken into consideration by the fluid-solid coupling transient thermal transfer analysis. The effects of the delaminations detected by the fluorescent penetrant inspection on the reliability of the bonding wire were also examined. It is found the delaminations existing at the interfaces within the ASLP module induce significant plastic strain to the wedge joint and results in fracture failure. The results from the numerical simulation can make a good prediction of the failure mechanism of the ASLP modules under thermal shock loading.

Comparison of LED package reliability under thermal cycling and thermal shock conditions by experimental testing and finite element simulation

High power light emitting diodes (LEDs) have begun to play an important role in many illumination applications due to their excellent performance in terms of high efficiency, low power consumption, high reliability and long life. With the rapid development of the LED industry, the reliability is becoming essential for the large scale applications of LED devices, modules and systems. Generally the thermal cycling and thermal shock test are conducted for validation the reliability performance and exposure the potential design problems during the new packaging development. In this paper, the reliability performance of the typically LED package is evaluated by the accelerated stress test under thermal cycling and thermal shock conditions. The optical degradation and electrical parameters variation of the LED package are monitored during the experiments. The thermo-mechanical responses of the LED package under thermal cycling and thermal shock loadings are investigated by sequential coupling thermo-mechanical finite element modeling interoperated with nonlinear time and temperature dependence materials properties. The stress and strain behavior of the LED package especially of the gold wire is examined. The effects of thermal gradient in the LED package during the thermal cycling and thermal shock tests and the time and temperature dependent materials property of the silicone on the reliability performance of the LED package are investigated. The physical mechanisms of failure of LED package samples are analyzed by decapulation and optical microscopic detection method. These efforts are helpful for design of reliability for the high power LED packaging development.

Failure analysis techniques for high power light emitting diodes

As the most promising candidate for the realization of high-efficiency light sources for general lighting, the high power lighting emitting diodes(HP-LEDs) still have reliability issues that hinder the large scale application of LED devices. Nowadays, the reliability is becoming an essential barrier for LED devices to substitute the traditional light sources. Failure analysis is one of the key approaches to improving the reliability of LED products. In this paper, three techniques, namely fluorescent penetrant inspection (FPI), chemical decapsulation and Nano-CT scanning, which are usually applied in other fields, are proposed as major failure analysis tools. Both of their advantages and disadvantages are also recommended, and then combining fluorescent penetrant inspection (FPI) and chemical decapsulation with field scanning electron microscope (FSEM) to analyze the failure modes of one LED sample undergoing 200 thermal shock cycles, and find the fracture of gold wire is attributed to excessive tensile stress of shrink of silicone encapsulations.

Junction temperature study during degradation process of high power light-emitting diodes

High junction temperature accelerates the degradation of the chips and the package materials of high power light emitting diodes (LEDs). In this paper, two experiments were conducted to investigate the fluctuation of junction temperature in the aging process. At the ambient temperature of 65°C, the samples from four different types of LED packages were used to investigate the variation of junction temperature, and four kinds of impact factors were proposed to explain the changes with temperature. It can be found that the annealing effect of materials on the upper interface of the packaged LED was the most important factor for the declined junction temperature in the early accelerated aging process. In addition, the thermal mismatch between the epilayer of chip and the substrate of package raised junction temperature in the later aging time.

Thermo-mechanical reliability of copper-filled and polymer-filled through silicon vias in 3D interconnects

Due to its many advantages over traditional 3D packaging technology, through silicon via (TSVs) is being widely used. However, there are still a variety of obstacles hindering it from being developed rapidly. One of them is the huge thermal stress induced by big CTE mismatch between silicon and copper, which would even induce interfacial delamination. In this paper, thermal stress is evaluated first through FEA analysis and severe stress concentration (about 300MPa) is found at the corner of copper attached to SiO2 dielectric layer when TSV is under serious temperature drop. Then a polymer-filled TSV is introduced, in which the thin SiO2 dielectric layer is replaced by a thick polymer isolation layer, conformal copper plating is used to realize the connection and the remaining hole in the copper via is filled with polymer material, and the analytical results reveal that thermal stress can be greatly reduced. Whats more, driving forces of both cracks in polymer-filled and copper-filled TSV are calculated under negative thermal loads to investigate whether and how a crack propagates if it is initiated at interface between silicon and copper. Only negative thermal loads are considered because it is found that strain energy release rate of a crack in polymer-filled TSV is much lower, but for the entire propagation process, phase angle is bigger than that of copper-filled one especially when the crack is short, showing that delamination in polymer-filled TSV is relatively tougher to initiate and propagate. Therefore, polymer-filled TSV has a higher thermo-mechanical reliability than the traditional TSV with wholly copper filled one. Furthermore, the effects of some factors, like polymer diameter, aspect ratio and copper diameter, on delamination are analyzed. It indicates that strain energy release rate increases greatly with increase of copper diameter and aspect ratio, but decreases when diameter of filled polymer increases.

Integrated wafer thinning process with TSV electroplating for 3D stacking

This paper presents an optimized integrated thinning process which is dedicated to fabricating ultra thin wafers with through silicon via (TSV). The thinning process is based on blind-vias electroplating, mechanical grinding, wet/dry etching, CMP(chemistry mechanical polishing)and a wafer to wafer handling system developed by previous studies [1,2]. In the study, 60μm TSV filled with copper is clearly observed in 40-um-thick 4-inch wafers, and the wafer flatness is successfully controlled to be below 5um. Meanwhile, the integrated thinning process is a low-cost one that only demands direct current (DC) electroplating and a relatively short period of CMP process, which may be applicable to industrial production.

An innovative way to improve the reliability of gold wire in lighting emitting diodes (LEDs)

As the most promising candidate for the realization of high-efficiency light sources for general lighting, the high power lighting emitting diodes (LEDs) still have reliability issues that hinder the large scale application of LED devices. Nowadays, the reliability is becoming an essential barrier for LED devices to substitute the traditional light sources. Before it is applied into mass production, many kinds of experiments under harsh conditions should be done to predict its reliability. Among those factors affecting LEDs reliability, fractures in the gold wire cannot be underestimated. Gold wire is often used for providing an electrical interconnection with outside power, while after some typical package reliability tests, such as the thermal cycling and thermal shock tests [3], there are fractures at two critical zones, the second bond and neck of the first bond. It is confirmed that the failure is mainly caused by the coefficient of thermal expansion (CTE) mismatch between gold and other materials and the large deformation of the silicone enclosing the gold wire.

Drop impact test on high power light emitting diodes module

In this study, reliability performances of high power light emitting diodes module subjected to drop test conditions are evaluated experimentally. Firstly, we have a theoretical analysis of the impact dynamic progress for the LED module. Secondly, a series of impact tests for LED module are also carried out by a self-made microelectronic drop tester. The good reproducibility of dynamic parameters such as impact force, and acceleration as a function of time are recorded for evaluating the impact response through the signal processing. Finally, we can conclude that the theoretical analysis is effective and the self-made drop tester is relatively precise by comparing the theoretical and experimental results. The main failure modes of LED module are lens off and crack formation in the impact experiment. The failure mechanisms of LED modules are analyzed in order to guide the design of LED light package modules.

Stability study of thick-film pressure sensor on steel substrate

Thick-film pressure sensors on steel substrate are proven to be robust and low cost, and can be used in many fields such as automotive industries, oil industries and military sectors. In this paper, finite element method (FEM) was used to evaluate residual thermal stresses and the self-heating of the thick film resistors (TFRs) on the offset voltage of the sensor. Results show that the residual stresses will affect the sensor output stability and accelerate the failure of dielectrics on steel substrate. The effects of self-heating of TFRs on the offset voltage can be negligible. Certain accelerated environmental tests are used to evaluate the robustness, stability of the sensors. Results show that the sensors have a stable output at constant temperature of 25°C. Most sensors have a small offset change after thermal cycling. Although some sensors have a relatively large zero drift after thermal cycling, and this drift can be relieved by appropriate heat treatment. Finally, thermal shock test and drop test have verified the robust bonding between the dielectrics and the steel substrate.

Effects of solder layer on the thermal performance of LED chip array package

As one type of the chip attachment materials, the solder layer inside the light-emitting diode (LED) packages can not only bond the chips to the substrate tightly, but also play the role of thermal interface material (TIM). Therefore, it makes a great influence on the thermal performance LED packages, especially in high density chip-array LED packaging. The solder layer has become one of the dominant research interests both in academics and industries. In this paper, numerical simulations were conducted to analyze the thermal behaviors of solder layer. The interactions between exterior heat dissipation condition and interior solder layer were studied. Simulations results show that improving the exterior heat dissipation condition is not always useful, a threshold may exist. Selecting different solders for die bonding can lead to different thermal characteristics, and decreasing the thickness of the solder layer is not always effective for lowering the junction temperature. Moreover, voids in the solder layer may not only lead to increase of the junction temperature, but also result in the addition of the temperature difference. It is concluded that thermal solutions to the high power LED module should take into account both the solder layer and exterior heat dissipation condition.