Ruqi Han

Characteristics and mechanism of conduction/set process in TiN∕ZnO∕Pt resistance switching random-access memories

The characteristics and mechanism of conduction/set process in TiN∕ZnO∕Pt-based resistance random access memory devices with stable and reproducible nanosecond bipolar switching behavior were studied. The dependencies of memory behavior on cell area, operating temperature, and frequency indicate that the conduction mechanism in low-resistance states is due to electrons hopping through filament paths. We also identify that the set process is essentially equivalent to a soft dielectric breakdown associated with a polarization effect caused by the migration of space charges under a low electric field stress. The generation/recovery of oxygen vacancies and nonlattice oxygen ions play a critical role in resistance switching.

Unified Physical Model of Bipolar Oxide-Based Resistive Switching Memory

A unified model is proposed to elucidate the resistive switching behavior of metal-oxide-based resistive random access memory devices using the concept of electron hopping transport along filamentary conducting paths in dielectric layer. The transport calculation shows that a low-electron-occupied region along the conductive filament (CF) is formed when a critical electric field is applied. The oxygen vacancies in this region are recombined with oxygen ions, resulting in rupture of the CFs. The proposed mechanism was verified by experiments and theoretical calculations. In this physical model, the observed resistive switching behaviors in the oxide-based systems can be quantified and predicted.

Gd-doping effect on performance of HfO2 based resistive switching memory devices using implantation approach

An implantation doping approach is implemented to fabricate Gd-doped HfO2 resistive random access memory (RRAM) devices. The significantly enhanced performances are achieved in the Gd-doped HfO2 RRAM devices including improved uniformity of switching parameters, enlarged ON/OFF ratio, and increased switching speed without obvious reliability degradation. This performance improvement in the Gd-doped HfO2 RRAM devices is clarified to the suppressed randomicity of oxygen vacancy filaments’ formation and the reduced oxygen ion migration barrier induced by trivalent Gd-doping effect. The achieved results also demonstrate the validity of implantation doping approach for the fabrication of RRAM devices.

Ionic doping effect in ZrO2 resistive switching memory

Oxygen vacancy (VO) plays the critical role for resistive switching in transition metal oxide resistive random access memory (RRAM). First principles calculation is performed to study the impact of metallic ion (Al, Ti, or La) doping in ZrO2 on the behaviors of VO, including defect energy level and formation energy (Evf). Trivalent dopant (Al or La) significantly reduces Evf. Based on the calculated results, ZrO2-based RRAM devices are designed to control the formation of VO, and improved resistive switching uniformity is demonstrated in experiments.

Improved Uniformity of Resistive Switching Behaviors in HfO2 Thin Films with Embedded Al Layers

A technical solution is presented to improve the uniformity of HfO 2 -based resistive switching memory by embedding thin Al layers between HfO 2 and electrode layers. Compared with those pure HfO 2 devices, a remarkably improved uniformity of switching parameters such as forming voltages, set voltages, and resistances in high/low states was demonstrated in the HfO 2 devices with embedded Al layers. Al atoms are assumed to diffuse into HfO 2 thin films and are intended to localize oxygen vacancies due to reduced oxygen vacancy formation energy, thus stabilizing the generation of conductive filaments, which helps improve the resistive switching uniformity.

Resistive Switching in

Al/CeOx/Pt devices with nonstoichiometric CeOx (1.5<x<2) films were fabricated. The unique resistive switching (RS) behaviors for resistive random access memory applications, including stable and sharp bipolar RS processes and a multilevel and self-stop set process without current compliance and without excessive requirement on a high-voltage electroforming process, were demonstrated. A multifilament switching model based on the distribution characteristics of oxygen vacancies in CeOx films is proposed to explain the observed RS behaviors.

\hbox{CeO}_{x}

A stacked CMOS technology fabricated on semiconductor-on-insulator (SOI) wafers with the p-MOSFET on the SOI film and the n-MOSFET on the bulk substrate is demonstrated. The technology provides a number of advantages, including: 1) single crystal multi-layer of active devices; 2) self-aligned double-gate p-MOSFET with thick source/drain and thin channel regions; 3) self-aligned channel region of n-MOSFET to p-MOSFET stacked perfectly on top of each other; 4) significant area saving; and 5) reduced interconnect distance and loading. Experimental results show that the fabricated double-gate p-MOSFET has a nearly ideal subthreshold swing and almost the same current drive as the n-MOSFET with the same lateral width, resulting in a highly compact and completely overlap stacked CMOS inverter.

Films for Nonvolatile Memory Application

The retention failure of bipolar oxide-based resistive switching memory is investigated. A new physical model is proposed to elucidate the typical retention failure behavior of the oxide-based resistive switching memory with a sudden resistance transition, which is quite different from that of the traditional memories. In the new proposed model, the temperature- and bias-dependent failure probability and failure time of the devices can be quantified. A temperature- and voltage-acceleration method is developed to evaluate the retention of resistive switching memories.

A stacked CMOS technology on SOI substrate

In this letter, a novel self-aligned double-gate (SADG) thin-film transistor (TFT) technology is proposed and experimentally demonstrated for the first time. The self-alignment between the top-gate (TG) and bottom-gate (BG) is realized by a noncritical chemical-mechanical polishing (CMP) step. An ultrathin channel and a thick source/drain, that allow better device performance and lower source/drain resistance, are also automatically achieved. N-channel poly-Si TFTs are fabricated with maximum processing temperature below 600/spl deg/C. Metal induced unilateral crystallization (MIUC) is used for poly-Si grain size enhancement. The fabricated SADG TFT exhibits symmetrical bidirectional transfer characteristics when the polarity of source/drain bias is interchanged. The on-current under double-gate operation is more than two times the sum of that under TG and BG operation.

Modeling of Retention Failure Behavior in Bipolar Oxide-Based Resistive Switching Memory

Binary metal-oxide-based resistive memory devices generally show broad dispersions of resistive switching parameters with continuous resistive switching, and this leads to severe readout and control hazards. In this paper, we report improvements of the resistive switching characteristics in TiO2-based resistive memory devices induced by the Gd doping of TiO2 films. The effect of Gd doping on the resistive switching of TiO2-based resistive memory devices is discussed.