Ryu Hasunuma

Nonuniformity in Ultrathin SiO2 on Si(111) Characterized by Conductive Atomic Force Microscopy

We have investigated two-dimensional fluctuation of current through 1.1-nm-thick SiO2 film using a conductive atomic force microscope. Upon analysis of the correlation between current and oxide surface morphology, the current was found to be larger at the low points in the topography. The correlation coefficient was varied in the measured areas. In addition, the current fluctuation correlated well with the topographical height using the direct tunneling formula in the high correlation area, from which we concluded that the oxide film shows nonuniform thickness as reflected by the surface morphology.

Conducting atomic force microscopy studies on local electrical properties of ultrathin SiO2 films

Abstract We have demonstrated the characterizations of the local electrical properties of ultrathin (1–4 nm) SiO 2 /Si(001) structures using a conducting atomic force microscopy with a nanometer-scale resolution in a vacuum (1×10 −5 Pa). The measurement in a vacuum enables to reduce the influence of adsorbed water on quantitative current measurements, while there is a problem at the measurement in air of 60% humidity. Fitting to the Fowler–Nordheim equation is good at thicker SiO 2 films more than ∼3 nm. We have also demonstrated the results of continuous current–voltage measurements during the breakdown process by charge injection through a conducting probe.

Electric properties of nanoscale contacts on Si(111) surfaces

Abstract We have investigated the electric properties of nanoscale contacts on Si(111)-7×7 surfaces with a scanning tunneling microscope (STM). The contacts between a W STM tip and Si substrates exhibit Schottky-type rectification, whose properties are obviously different from the conventional plane diodes. The current variation during tip retraction from the contact region indicates the influence of Si atoms between the tip and substrates, as well as the contact size effects, which result from the Si atom removal with the present experimental technique.

Comprehensive Analysis of Positive and Negative Bias Temperature Instabilities in High-k/Metal Gate Stack Metal-Oxide-Silicon Field Effect Transistors with Equivalent Oxide Thickness Scaling to Sub-1 nm

We have undertaken a comprehensive analysis of the positive bias temperature instability (PBTI) and negative bias temperature instability (NBTI) reliabilities of high-k/metal gate stacks. In the case of PBTI, electron traps constituted the main factor in drain current degradation resulting in an initial jump in threshold voltage shift due to fast transient electron traps, which depended only on stress voltage, because of the formation of positive oxygen vacancies near the cathode. However, in the case of NBTI, both interface state degradation (including interface hole traps) and hole traps in bulk HfSiON should be considered. We have clarified that the interface layer quality is related to not only the high transconductance but also the hole traps. The use of a high-quality interfacial layer, such as a wet oxide interface, represents a promising solution for the improvement of NBTI lifetime.

Observation of leakage sites in a hafnium silicon oxynitride gate dielectric of a metal-oxide-semiconductor field-effect transistor device by electron-beam-induced current

Leakage sites in hafnium silicon oxynitride gate dielectrics of metal-oxide-semiconductor field-effect transistors were directly identified by means of electron-beam-induced current (EBIC) technique. Leakage sites were observed as bright spots mostly on the periphery of gate. With the gate bias increasing, the EBIC current of bright spots increased exponentially, but the number of bright spots did not increase.

Selective Growth of Monoatomic Cu Rows at Step Edges on Si(111) Substrates in Ultralow-Dissolved-Oxygen Water

We have fabricated high-aspect-ratio monoatomic Cu rows along atomic step edges on vicinal Si(111) substrates. The method consists of two wet processes: (1) the formation of a step/terrace structure by immersing a Si(111) substrate in ultralow-dissolved-oxygen water (LOW) and (2) the formation of the nanowires by immersion in LOW containing Cu ions. A systematic investigation of Si(111) surfaces with the nanowire has been performed by means of atomic force microscopy, Fourier-transform infrared absorption spectroscopy, and total-reflection X-ray fluorescence spectroscopy.

Degradation of Atomic Surface Flatness of SiO2 Thermally Grown on a Si Terrace

In this study, the atomic-scale roughness and uniformity of SiO 2 thermally grown on an atomically flat Si surface were investigated. The SiO 2 surface roughness increased with increasing oxide thickness in the initial rapid oxidation region of the Deal-Grove model. This roughness growth was a result of reoxidation of SiO species near the SiO 2 surface, which were emitted from the Si/SiO 2 interface during oxidation. However, the surface roughness growth is saturated in the linear-rate oxidation region. This is because the emitted SiO species within the SiO 2 were reoxidized without thickness increment, and the generated oxidation stress was absorbed within the film. Although the amount of the emitted SiO decreases by the surpassing relaxation effect, the surface roughness is kept without shrinking. An incubation period before the onset of roughening was found, during which the surface roughness remained unchanged.

Analysis on electrical properties of ultrathin SiO2/Si(111) interfaces with an atomic force microscope

Abstract We investigated the distribution of tunneling current through ultrathin oxide films on Si(111) with an atomic force microscope (AFM) using a conductive tip. The oxides were grown in dry O 2 at 600°C with or without post-oxidation annealing. For the oxide without post-oxidation annealing, we observed high tunneling current in the vicinity of step edges, which could be attributed to localized interface states around the step edges, while we could not detect such localized states for the oxides with post-oxidation annealing in H 2 . This is an evidence that the localization states are active interface states and therefore, they were terminated with hydrogen during annealing. These results were supported by the conventional current–voltage ( I – V ) measurement on metal oxide semiconductor (MOS) capacitors with 1.5-nm-thick oxides, showing the larger current for the substrates with the higher step density. The tunneling current was drastically reduced after the post-oxidation annealing.

Layer‐by‐layer atomic manipulation on Si(111)‐7×7 surface

Layer‐by‐layer removal of Si atoms from the Si(111)‐7×7 surface was executed at room temperature by making a point contact of a biased W tip of scanning tunneling microscope (STM) to the sample surface. The adatom layer and the three layers were controllably removed by tuning the sample bias voltage. In the created holes, clear atomic images were obtained. The current between the STM tip and substrate exhibited characteristic structures during the tip excursion, which are closely related with the atom removal process and the nature of the Si nanoscale wire, respectively.

Microscopic Thickness Uniformity and Time-Dependent Dielectric Breakdown Lifetime Dispersion of Thermally Grown Ultrathin SiO2 Film on Atomically Flat Si Surface

Microroughness at the surface and interface of SiO2 thermally grown on an atomically flat Si terrace was investigated by atomic force microscopy. Although surface protuberances on SiO2 increased in height during oxidation, their relative locations were preserved. Their positions were mostly determined in the initial stage of oxidation and their heights increased during the subsequent oxidation. It was also found that, at many positions, protuberances on the SiO2 surface correspond to dimples at the interface and the dimples on the SiO2 surface correspond to the protuberances on the Si/SiO2 interface. With decreasing thickness, the thickness of the SiO2 layer becomes two-dimensionally less uniform. The Weibull slope of the time-dependent dielectric breakdown lifetime decreased when the thermal SiO2 films were grown on rougher Si substrates, which was attributed to film thickness nonuniformity. The SiO2 film formed on well-defined Si wafers showed a higher microscopic thickness uniformity and higher long-term reliability.