S.A.V. Satya Murty

Experimental analysis of RSSI for distance and position estimation

In wireless sensor network (WSN), position awareness (localization) of the sensor nodes is necessary to exploit the communication and to provide the meaningful information about their surroundings. Here Received Signal Strength Indicator (RSSI) technique is used as it requires no extra hardware and can be used for both indoor and outdoor environment. RSSI is having limitations such as high randomness due to fading and shadowing. This makes difficulties in establishing exact relationship between RSSI value and distance. In this paper we propose the method of creating database by using Split Range Technique (SRT) to estimate the approximate distance between two nodes. Using this database, position estimation has been done. For this Adaptive n-Triangle algorithm is implemented. Present results of RSSI shows the approximate positioning of the sensor node with the error estimation of about 5–10%. The experiment can be extended to show the predicted path of a moving object which is being identified by sensors.

Testbed based throughput analysis in a Wireless Sensor Network

This paper presents the throughput results obtained from a Wireless Sensor Network testbed, with single and multiple sources in different network deployments and routing architectures. The experimental testbed deployed at IIT Madras consisted of commercially available Crossbow TelosB and MicaZ nodes and a custom-built sensor node based on the DigiNet Xbee chip, with all nodes implementing the Zigbee standard. The networks were deployed in uniform grid topologies in three different deployments with up to 228 nodes. The main aim of the experiments is to analyze the throughput and packet delivery ratio observed with single and multiple sources. The experimental results show that delivery ratio reduces with increase in data rate due to collisions and help characterise the network capacity limits.

Energy and Link Quality Based Routing for Data Gathering Tree in Wireless Sensor Networks Under TINYOS - 2.X

Energy is one of the most important and scarce resources in Wireless Sensor Networks (WSN). WSN nodes work with the embedded operating system called TinyOS, which addresses the constrains of the WSN nodes such as limited processing power, memory, energy, etc and it uses the collection Tree Protocol (CTP) to collect the data from the sensor nodes. It uses either the four-bit link estimation or Link Estimation Exchange Protocol (LEEP) to predict the bi directional quality of the wireless link between the nodes and the next hop candidate is based on the estimated link quality. The residual energy of the node is an important key factor, which plays a vital role in the lifetime of the network and hence this has to taken as one of the metric in the parent selection. In this work, we consider the remaining energy of the node as one of the metric to decide the parent in addition to the link quality metrics. The proposed protocol was compared with CTP protocol in terms of number of packets forwarded by each node and packet reception ratio (PRR) of the network. This work was simulated in TOSSIM simulator and the same was tested in Crossbow IRIS radio test bed. The results show that our algorithm performs better than CTP in terms of load distribution and hence the increased lifetime

Inner race bearing fault detection using Singular Spectrum Analysis

A novel method to diagnose the bearing fault is presented. The proposed method is based on the analysis of the bearing vibration signals using Singular Spectrum Analysis (SSA). SSA is a non-parametric technique of time series analysis that decomposes the acquired bearing vibration signals into an additive set of time series to extract information correlated with the condition of the bearing. Information in terms of time-domain features extracted from the SSA processed signal has been presented to a neural network for determination of inner race bearing fault. The result shows the effectiveness of the proposed method.

A testbed for distributed target tracking with directional sensors

Target tracking is an important application of Wireless Sensor Networks (WSN). This paper presents the design of a WSN testbed that used a custom-built wireless sensor node, specifically designed for target tracking. The sensor node consists of a Digi Xbee device, a Passive Infrared (PIR) and MaxSonar ultrasonic ranging sensors. Appropriate multi-channel MAC protocols were designed and implemented. The experiments were conducted with up to 20 sensor nodes in indoor and outdoor environments, with a human target moving at pedestrian speeds. We found that directional sensing, inter-sensor interference, sensing and processing delays are significant in determining the target location. This work highlights some of the practical difficulties in realizing such systems in practice. The experiments show that the ultra-sonic ranging sensor does indeed provide improved target tracking information when compared to the PIR sensor.

Development of FPGA based IIR Filter implementation of 2-degree of Freedom PID controller

In this paper an attempt has been made to present the development of FPGA based IIR Filter implementation of PID controller which takes care of issues like the derivative kick, integral saturation, bumpless transfer from manual to automatic mode. The paper starts with an overview of the FPGA technology and motivation for using it in control and then moves on into the philosophy of closed loop PID control. The design issues are explored next using MATLAB and SYSTEM GENERATOR tools. Finally simulation results are presented. Also a performance comparison between the conventional PID control and the 2-Degree of Freedom PID control for a second order process is presented.

Accelerated life testing of Field Programmable Gate Arrays

Advent of VLSI technology has paved the way for Programmable Logic Devices (PLD), which are widely used as the basic building blocks in high integrity electronic systems. PLDs are considered for their robust features such as high gate density, performance, speed etc. For PFBR Instrumentation and Control systems, PLDs are extensively used to implement digital designs such as VME bus interface logic, control logic and sequencing logic etc. Types of PLDs, such as Field Programmable Gate Arrays, Complex Programmable Logic Devices and Gate Array Logic devices are used in Core Temperature Monitoring System and Safety logics of shutdown systems. Since these devices are reliable as per the manufacturers specification, they were used in R&D facilities like Fast Breeder Test Reactor and Augmented Boron Enrichment Plant as test beds.

DSDPC: Delay signatures at different process corners based hardware trojan detection technique for FPGAs

In applications such as nuclear power plant, space and military, safety critical systems play an important role, where security is one of the crucial design parameters. Similar to software Trojans (virus), Hardware Trojans (HT) are raising security concerns in recent years. HTs are malicious additions or modifications to existing circuit elements which are implemented either as always on or triggered only under certain conditions, to disable functionality, reduce reliability and leak valuable information from the integrated chip. In this paper, we consider the scenario of HTs inserted in field programmable gate array (FPGA) devices during field operating conditions and propose a delay signature based HT detection technique. Static timing analysis is performed to measure the delay signatures of original netlist with that of netlist extracted from field configuration bit file. Since the results of electronic design automation tools are repetitive, we compare both the delay signatures and any deviation will indicate that configuration bit file/ netlist file of the original design is altered. To increase the detection efficiency, we perform static timing analysis at various process corners such as slow, typical and fast corners (at different voltage and temperature combinations) which allows us to measure the best and worst circuit delay values. Using this property, we performed simulations with Xilinx ISE tool by targeting standard benchmark circuits on Xilinx device. Experimental results reflected the difference in delay signatures if configuration bit file is tampered with in the field. The delay difference between with and without HT circuit is enhanced from slow to fast process corner, which in turn increased the HT detection efficiency.

Geant4 simulations of semiconductor detectors (SiC) for fast neutron spectroscopy

A proton recoil method along with Silicon Carbide semiconductor detector is presented in this paper. It consist of hydrogenous converter layer to generate recoil protons by means of neutron elastic scattering (n, p) reaction and radiation hard semiconductor material (Silicon Carbide) layer to generate detectable electrical signal upon transport of recoil protons through it. Converter layer thickness is optimized for different monoenergetic and standard neutron sources using Monte Carlo based Geant4 simulation toolkit, in order to facilitate the study of detector characteristics in greater detail.

Real Time Computer for plugging indicator control of Prototype Fast Breeder Reactor

Prototype Fast Breeder Reactor (PFBR) is in the advanced stage of construction at Kalpakkam, India. Liquid sodium is used as coolant to transfer the heat produced in the reactor core to steam water circuit. Impurities present in the sodium are removed using purification circuit. Plugging indicator is a device used to measure the purity of the sodium. Versa Module Europa bus based Real Time Computer (RTC) system is used for plugging indicator control. Hot standby architecture consisting of dual redundant RTC system with switch over logic system is the configuration adopted to achieve fault tolerance. Plugging indicator can be controlled in two modes namely continuous and discontinuous mode. Software based Proportional-Integral-Derivative (PID) algorithms are developed for plugging indicator control wherein the set point changes dynamically for every scan interval of the RTC system. Set points and PID constants are kept as configurable in runtime in order to control the process in very efficient manner, which calls for reliable communication between RTC system and control station, hence TCP/IP protocol is adopted. Performance of the RTC system for plugging indicator control was thoroughly studied in the laboratory by simulating the inputs and monitored the control outputs. The control outputs were also monitored for different PID constants. Continuous and discontinuous mode plots were generated.