S. Bandy

5-100 GHz InP coplanar waveguide MMIC distributed amplifier

A single-stage 5-100-GHz InP MMIC (monolithic microwave integrated circuit) amplifier with an average gain of more than 5.5 dB has been developed. This MMIC distributed amplifier has the highest frequency and bandwidth of operation (5-100 GHz) reported to date for wideband amplifiers. The average associated (not optimized) noise figure of the MMIC amplifier was approximately 5.8 dB measured over 4-40 GHz. The active devices in this seven-section distributed amplifier were 0.1- mu m mushroom gate, InGaAs-InAlAs lattice-matched HEMTs (high electron mobility transistors) on a semi-insulating InP substrate. A coplanar waveguide was the transmission medium for this 100-GHz MMIC with an overall chip dimension of 500 mu m by 860 mu m. >

5-100 GHz InP CPW MMIC 7-section distributed amplifier

The development of a single-stage 5-100-GHz InP monolithic microwave IC (MMIC) amplifier with an average gain of more than 5.0 dB is reported. This MMIC distributed amplifier has the highest frequency and bandwidth of operation (5-100 GHz) reported for wideband amplifiers. The active devices in this seven-section distributed amplifier are 0.1- mu m mushroom-gate InGaAs-InAlAs lattice-matched HEMTs on a semiinsulating InP substrate. Coplanar waveguide is the transmission medium for this 100-GHz MMIC with an overall chip dimension of 500 by 860 mu m. This is the first 100-GHz coplanar waveguide circuit on an InP substrate.<<ETX>>

Coplanar Waveguides Used in 2-18 GHz Distributed Amplifier

This paper describes the use of coplanar waveguide as an alternative transmission medium in a monolithic distributed amplifier. The coplanar waveguide layout substantially reduces coupling effects between adjacent lines, and eliminates the need for via holes and substrate thinning, leading to higher fabrication yields. The resulting device reported here is a compact (1.3 x 1.5mm) low noise distributed amplifier on a thick GaAs substrate (15 mil), with a gain of 6.0 +- 0.5dB over the frequency range of 2 - 18GHz.

High-gain, low-noise monolithic HEMT distributed amplifiers up to 60 GHz

Ultrabroad-bandwidth distributed amplifiers with cutoff frequencies of 45 to 60 GHz were developed using 0.25- mu m high-electron-mobility transistors (HEMTs) with a mushroom gate profile. Both single and cascode HEMTs were used as the active devices in the amplifiers. A measured gain as high as 10+or-1 dB from 5 to 50 GHz and a gain of 8+or-1 dB from 5 to 60 GHz, respectively, were achieved from amplifiers using cascode HEMTs. The measured noise figure for these amplifiers is approximately 3-4 dB in the Ka-band. The chip size is 2.3*0.9 mm. Device considerations, circuit design, monolithic IC fabrication, and the measured performance of the amplifiers are outlined.<<ETX>>

A 2-20 GHz, High-Gain, Monolithic HEMT Distributed Amplifier

A low-noise 2-20 GHz monolithic distributed amplifier utilizing 0.3-micron gate-length HEMT devices has achieved 11-dB +- 0.5 dB of gain. This represents the highest gain reported for a distributed amplifier using single FET gain cells. A record low noise figure of 3 dB was achieved mid-band (7-12 GHz). The circuit design utilizes five HEMT transistors of varying width with gates fabricated by E-beam lithography.

Submicron GaAs microwave FET's with low parasitic gate and source resistances

The substantial reduction in gate metallization resistance and improvement in performance of submicron-gate GaAs FETs has been achieved by employing a mushroom profile defined by electron-beam exposure. Using MBE growth of buffer, channel, and n+ contact layers, minimum noise figures of 1.0-1.1 dB have been demonstrated at 8 GHz, with associated gains of 13-14 dB.

A monolithic 40-GHz HEMT low-noise amplifier

A description is given of a monolithic, reactively matched 40-GHz low-noise amplifier using a 0.25- mu m high-electron-mobility transistor (HEMT) as the active device. Standard processing techniques were used for most of the fabrication steps. An amplifier using a triangular gate profile achieved approximately 6.5-dB gain and a 5-dB noise figure from 38 to 44 GHz. The gain of the amplifier increased to 8 dB and the noise figure decreased to 4 dB when the gate was replaced by one with a mushroom-like profile. The chip size is 1.1 mm*1.1 mm.<<ETX>>A monolithic, single-stage HEMT (high-electron-mobility transistor) low-noise amplifier has been developed at 40 GHz. This amplifier includes a single 0.25- mu m gate-length HEMT active device with on-chip matching and biasing circuits. A gain of 6.5 dB and a noise figure of 5 dB were measured from 38 to 44 GHz. By replacing the triangular gate profile with a mushroom gate profile the amplifier achieved 8-db gain and 4-dB noise figure from 36 to 42 GHz. The chip size is 1.1 mm*1.1 mm.<<ETX>>

A High Gain, Monolithic Distributed Amplifier Using Cascode Active Elements

A novel, monolithic, distributed amplifier has achieved a record gain of over 10 dB from 2-18 GHz. The design utilizes five quarter-micron gate length, cascode connected, FETs on epitaxial material . Circuit simulations predict over 10 dB gain from 2-30 GHz for an amplifier with seven active elements. Novel features of the design, fabrication and testing are discussed.

A monolithic Ka-band HEMT low-noise amplifier

A monolithic, single-stage high-electron-mobility transistor (HEMT) low-noise amplifier was developed for the 20-40-GHz band. This amplifier includes a single 0.25- mu m-gate-length HEMT active device with on-chip matching and biasing circuits. A gain of approximately 6 dB from 20 to 38 GHz and a noise figure of approximately 5 dB from 26.5 to 38 GHz were measured. The chip size is 2.2 mm*1.1 mm.<<ETX>>

The design, fabrication, and evaluation of a silicon junction field-effect photodetector

A new device for photodetection is introduced in this study that is capable of responsivities comparable to devices operating in the charge-storage mode. Since the physical process involved corresponds to a photodiode in series with a high value of resistance, the device operates in real time and hence avoids the problems of switching encountered in the charge-storage mode at low light levels. The device utilizes this physical process in a new technique that significantly reduces the required surface area. Although the junction field-effect transistor (FET) serves as the prototype for the device, considerations for improving the magnitude of the output response and its linearity along with the responsivity-bandwidth product lead to a device having a very low transconductance _{m} and a large cutoff voltage V GC . Field-effect photodetectors fabricated in accordance with the principles developed for optimum photodetection are evaluated. Epitaxial silicon of conventional doping was used in the fabrication. The devices are found to exhibit the photodetecting characteristics expected from theoretical considerations. A simple two-lump approximation of the distributed gate-channel interface is found to adequately describe the frequency response of the devices. In contrast to the area-independent responsivity of the charge-storage mode, it is shown that the responsivity of the field-effect photodetector is proportional to the square of the device surface area. Depending upon the illumination level and the deviation from linearity that is tolerable, this area dependence presents one of the fundamental drawbacks of the field-effect photodetector for applition in dense arrays.