S. F. Chen

Light guide for pixel crosstalk improvement in deep submicron CMOS image sensor

Light guide, a novel dielectric structure consisting of PE-Oxide and FSG-Oxide, has been developed to reduce crosstalk in 0.18-/spl mu/m CMOS image sensor technology. Due to the difference in refraction index (1.46 for PE-Oxide and 1.435 for FSG-Oxide), major part of the incident light can be totally reflected at the interface of PE-Oxide/FSG-Oxide, as the incidence angle is larger than total reflection angle. With this light guide, the pixel sensing capability can be enhanced and to reduce pixel crosstalk. Small pixels with pitch 3.0-/spl mu/m and 4.0-/spl mu/m have been characterized and examined. In 3.0-/spl mu/m pixel, optical crosstalk achieves 30% reduction for incidence angle of light at 10/spl deg/.

Effect of polycrystalline-silicon gate types on the opposite flatband voltage shift in n-type and p-type metal-oxide-semiconductor field-effect transistors for high-k-HfO2 dielectric

Hafnium dioxide (HfO2) gate dielectrics formed by the atomic layer deposition (ALD) process were fabricated to investigate the flatband voltage shift (ΔVFB) relative to SiO2. It is found that the direction of ΔVFB depends on the Fermi level position in the gate material, which shows respective positive and negative shifts in n-type and p-type metal–oxide–semiconductor field-effect transistors (MOSFETs), regardless of the substrate type. The opposite direction in the flatband voltage shift is attributed to both acceptor- and donor-like interface states existing at the interface between the polycrystalline-silicon (poly-Si) gate and HfO2 dielectric. A model is proposed to explain the effects of poly-Si gate type on the flatband voltage shift in MOSFETs.

A deep submicrometer CMOS process compatible high-Q air-gap solenoid inductor with laterally laid structure

A high-quality (Q) on-chip solenoid inductor has been fabricated by 0.18 mm CMOS technology with air-gap structure. The solenoid structure with laterally laid out structure saves the chip area significantly and the air-gap suppresses the parasitic capacitances to obtain high-Q value. Additionally, with software ANSYS simulation, the solenoid inductor also possesses a higher strength for impact (80 000 times) in comparison to a spiral inductor. The measured peak-Q and peak-Q frequency with an air-gap are 8.8 and 1.7 GHz, respectively, which present almost 9% improvements in the magnitude and 54% in the peak-Q frequency in comparison to the conventional solenoid inductor at 8.1 and 1.1 GHz.

Computer simulation and measurement of error vector magnitude (EVM) and adjacent-channel power ratio (ACPR) for digital wireless communication RF power amplifiers

Computer simulation and measurement of the error vector magnitude (EVM) and the adjacent channel power ratio (ACPR) of a 2.4 GHz MMIC power amplifier (PA) for digital wireless communications is presented. A computer simulation based on the /spl pi//4-DQPSK modulation with square-root raised cosine (SRRC) filter is established for this study. Using digital signal processing techniques and a time-domain approach, we can accurately predict the EVM and the ACPR related to the input power. The nonlinear effects of the MMIC PA are modeled as traditional nonlinearity parameters, such as 1-dB gain compression point or third-order intercept point IP3, by which the EVM and ACPR are simulated. A standard NADC modulated signal from a HP ESG-D signal generator is applied to the MMIC PA and the output signal analyzed by a HP 89410A vector signal analyzer. The measured results agree well with the simulation curves. This shows that the computer program by Matlab is useful to RF/microwave system engineers in the design of power amplifiers for digital wireless communications.

Improvement of short-channel characteristics of a 0.1-/spl mu/m PMOSFET with ultralow-temperature nitride spacer by using a novel oxide capped boron uphill treatment

In this work, the thermal annealing at 720/spl deg/C for 2 hr (called boron uphill treatment) with an SiO/sub 2/-capped layer was applied after source/drain extensions (SDE) implantation to improve the short channel characteristics of a 0.1-/spl mu/m PMOSFET with an ultra-low temperature nitride spacer. The influence and the mechanism of the capped layer on this uphill treatment were investigated. The results show that the capped layer treatment indeed leads to a shallower junction, improved V/sub th/ roll-off characteristic, and added immunity against subsurface punchthrough.

The mechanism and evaluation of hot-carrier-induced performance degradation in 0.18-/spl mu/m CMOS image sensor

An effective method to evaluate the hot-carrier-induced pixel performance degradation of 0.18-/spl mu/m CMOS active pixel sensor has been reported. The hot carriers generated at the source follower transistor and absorbed by the nearby photodiode will cause the pixel performance degradation such as increase of dark signal and decrease of operation range. Based on the detailed measurements through overall operation conditions, a simple method has been proposed to evaluate the degradation induced by the hot carriers and, thus, provides a design guide to predict pixel performance.