Yean-Kuen Fang

A tin oxide thin film sensor with high ethanol sensitivity

An SnO 2 thin film ethanol gas sensor has been fabricated by electron-gun evaporation and proper annealing in ambient oxygen gas. This processing yielded an SnO 2 thin film with fine particles and good structure, thus providing a sensor with a high sensitivity and selectivity in detecting ethanol gas. The main part of this paper is a report of the detailed preparation conditions, experimental data on sensing characterization and performance of the sensor.

High sensitivity ethanol gas sensor integrated with a solid-state heater and thermal isolation improvement structure for legal drink-drive limit detecting

Abstract The paper reports the successful fabrication of ethanol gas sensors with tin-dioxide (SnO 2 ) thin films integrated with a solid-state heater, which is realized with technologies of micro-electro-mechanical systems (MEMS), and are compatible with VLSI processes. The main sensing part with dimensions of 450×400 μm 2 in this developed device is composed of a sensing SnO 2 film, which is fabricated by electron-gun evaporation with proper annealing in ambient oxygen gas to yield fine particles and good structure. An integrated solid-state heater with a 4.5 μm-thick cantilever bridge (1000×500 μm 2 ) structure is made of silicon carbide (SiC) material by MEMS technologies. The sensitivity for 1000 ppm ethanol gas reaches as high as 90 with 10 s and 2 min for the response and recovery time, respectively, at an operating temperature of 300°C. Those experimental results also exhibit a much superior performance to that of a popular commercial ethanol gas sensor TGS-822. Therefore, the developed sensor with high performance is a good candidate for some specific application in automobile to detect drink-drive limit and allows an array integration available with various films for controlling each element at separate resistance.

Light guide for pixel crosstalk improvement in deep submicron CMOS image sensor

Light guide, a novel dielectric structure consisting of PE-Oxide and FSG-Oxide, has been developed to reduce crosstalk in 0.18-/spl mu/m CMOS image sensor technology. Due to the difference in refraction index (1.46 for PE-Oxide and 1.435 for FSG-Oxide), major part of the incident light can be totally reflected at the interface of PE-Oxide/FSG-Oxide, as the incidence angle is larger than total reflection angle. With this light guide, the pixel sensing capability can be enhanced and to reduce pixel crosstalk. Small pixels with pitch 3.0-/spl mu/m and 4.0-/spl mu/m have been characterized and examined. In 3.0-/spl mu/m pixel, optical crosstalk achieves 30% reduction for incidence angle of light at 10/spl deg/.

A contact-type piezoresistive micro-shear stress sensor for above-knee prosthesis application

A prototype contact-type micro piezoresistive shear-stress sensor that can be utilized to measure the shear stress between skin of stump and socket of above-knee (AK) prosthesis was designed, fabricated and tested. Micro-electro-mechanical system (MEMS) technology has been chosen for the design because of the low cost, small size and adaptability to this application. In this paper, the finite element method (FEM) package ANSYS has been employed for the stress analysis of the micro shear-stress sensors. The sensors contain two transducers that will transform the stresses into an output voltage. In the developed sensor, a 3000/spl times/3000/spl times/300 /spl mu/m/sup 3/ square membrane is formed by bulk micromachining of an n-type [100] monolithic silicon. The piezoresistive strain gauges were implanted with boron ions with a dose of 10/sup 15/ atoms/cm/sup 2/. Static characteristics of the shear sensor were determined through a series of calibration tests. The fabricated sensor exhibits a sensitivity of 0.13 mV/mA-MPa for a 1.4 N full scales shear force range and the overall mean hysteresis error is than 3.5%. In addition, the results simulated by FEM are validated by comparison with experimental investigations.

Downscaling limit of equivalent oxide thickness in formation of ultrathin gate dielectric by thermal-enhanced remote plasma nitridation

The gate-oxide downscaling limit in thermal-enhanced remote plasma nitridation (RPN) process for forming ultrathin gate dielectric has been extensively investigated. In this work, the radical-induced re-oxidation effect has been observed as the base-oxide thickness less than 20 /spl Aring/. Nevertheless, for the base-oxide thickness thicker than 17 /spl Aring/, the RPN process still can effectively reduce the equivalent oxide thickness (EOT) and almost no transconductance degradation is observed. Further thinning of the base oxide will degrade the reduction of EOT and the transconductance with the RPN process, due to the penetration of nitrogen radicals into the active region. The physical and electrical properties of the ultrathin oxides (10 /spl sim/ 20 /spl Aring/) affected by this radical penetration have been studied extensively as well. Finally, the thinnest thickness has been estimated by compromising the feasible base-oxide thickness, the degradation of device performance, and the gate leakage criteria. Based on the forementioned criteria, we rind the 14 /spl Aring/ EOT to be the downscaling limit of the gate-oxide thickness.

An amorphous SiC/Si heterojunction p-i-n diode for low-noise and high-sensitivity UV detector

The authors report the UV photoresponse of an a-SiC/a-Si heterojunction p-i-n diode with the structure of glass/TCO (transparent conducting oxide, SnO/sub 2/:F)/p-a-SiC:H/i-a-Si:H/n-a-Si:H/Al. The diode has been designed for a high-sensitivity and low-noise UV detector. The diode has its peak responsivity (0.254 A/W) and quantum efficiency (81.5%) at 385 nm. This structure possesses (1) the window effect by using the wide-bandgap a-SiC:H as the front layer (p-layer) and (2) the carrier confinement effect at the p-SiC:H/i-a-Si:H interface. Enhancements are proposed to raise UV response and suppress long-wave responsivity. The diode was designed to be operated under zero external bias to suppress the dark-current-induced noise. Results show a 200% higher UV sensitivity than a GaAsP Schottky photodiode in the 200-400-nm wavelength region. >

Effect of polycrystalline-silicon gate types on the opposite flatband voltage shift in n-type and p-type metal-oxide-semiconductor field-effect transistors for high-k-HfO2 dielectric

Hafnium dioxide (HfO2) gate dielectrics formed by the atomic layer deposition (ALD) process were fabricated to investigate the flatband voltage shift (ΔVFB) relative to SiO2. It is found that the direction of ΔVFB depends on the Fermi level position in the gate material, which shows respective positive and negative shifts in n-type and p-type metal–oxide–semiconductor field-effect transistors (MOSFETs), regardless of the substrate type. The opposite direction in the flatband voltage shift is attributed to both acceptor- and donor-like interface states existing at the interface between the polycrystalline-silicon (poly-Si) gate and HfO2 dielectric. A model is proposed to explain the effects of poly-Si gate type on the flatband voltage shift in MOSFETs.

Substrate noise-coupling characterization and efficient suppression in CMOS technology

This brief investigates the substrate noise coupling using S-parameters measurement. Radio frequency domain analysis shows that the noise isolation is strongly dependent on layout geometry, including the parameters such as p-n junction, physical separation distance, guard ring (GR), and deep n-well (DNW). We found that the noise coupling can be efficiently diminished by incorporating GR and DNW structures.

A metal-amorphous silicon-germanium alloy Schottky barrier for infrared optoelectronic IC on glass substrate application

The effects of material and structure parameters on an amorphous-silicon-germanium alloy Schottky barrier diodes responsivity have been investigated in detail. The effects contradict each other. A compromise is made in selecting parameters for construction of a Si/sub 1-x/Ge/sub x/:H Schottky barrier for an IR detector. The optimized amorphous-silicon-germanium alloy Schottky diode using x=0.43 alloy with a 900-nm-thick i-layer was found to have a peak at 850 nm with a responsivity of 0.6 A/W under -2-V bias. The diode also has a response time of 33 mu s and slight photodegradation. Thus, the diode becomes a candidate for manufacturing the infrared OEIC (optoelectronic integrated circuit) on glass substrate in applications which require size, reproducibility, and low cost more than sensitivity. >

The Geometry Effect of Contact Etch Stop Layer Impact on Device Performance and Reliability for 90-nm SOI nMOSFETs

The thickness effects of a high-tensile-stress contact etch stop layer (HS CESL) and the impact of layout geometry (length of diffusion (LOD) and gate width) on the mobility enhancement of lang100rang/(100) 90-nm silicon-on-insulator (SOI) n-channel MOSFETs (nMOSFETs) were studied in detail. Additionally, the low-frequency characteristics were inspected using low-frequency noise investigation for floating body (FB)-SOI nMOSFETs. Experimental results show that a device with a 1100-Aring HS CESL has worse characteristics and hot-carrier-induced degradations than a device with a 700-Aring; HS CESL due to larger stress-induced defects. The lower plateau of the Lorentzian noise spectrum that was observed from the input-referred voltage noise Svg implies a higher leakage current for devices with a 1100-Aring HS CESL. On the other hand, it was found that devices with narrow gate widths have higher driving capacity for a larger fringing electric field and higher compressive stress in the direction perpendicular to the channel. Because of the more serious impact of compressive stress in a direction parallel to the channel, a device with shorter LOD experiences more serious performance degradation