S. Faramehr

Drift-diffusion and hydrodynamic modeling of current collapse in GaN HEMTs for RF power application

Current collapse due to the trapping/de-trapping of the carriers at the surface and in the bulk of a 0.25 µm gate length AlGaN/GaN high electron mobility transistor is investigated using 2d technology computer aided design transient simulations. Gate and drain pulse techniques are used to study the dynamic picture of trapping and de-trapping of carriers within drift-diffusion and hydrodynamic transport models. In addition, coupled electrical and thermal simulations are performed to model the energy exchange of the carriers with the lattice and to predict electron temperature in the channel. It is found that current degradation upon electrical stress is due to two different types of traps, donor-like traps and acceptor-like traps, respectively. The collapse next to 5% and 75% was observed for bulk and surface traps, respectively. The combined effect of surface and bulk traps on current transient characteristics has been investigated and simulations are in very good qualitative agreement with the experimental observations.

Design and simulation of a novel 1400 V–4000 V enhancement mode buried gate GaN HEMT for power applications

A novel enhancement mode structure, a buried gate gallium nitride (GaN) high electron mobility transistor (HEMT) with a breakdown voltage (BV) of 1400 V–4000 V for a source-to-drain spacing (LSD) of 6 μm–32 μm, is investigated using simulations by Silvaco Atlas. The simulations are based on meticulous calibration of a conventional lateral 1 μm gate length GaN HEMT with a source-to-drain spacing of 6 μm against its experimental transfer characteristics and BV. The specific on-resistance RS for the new power transistor with the source-to-drain spacing of 6 μm showing BV = 1400 V and the source-to-drain spacing of 8 μm showing BV = 1800 V is found to be 2.3 mΩ cm2 and 3.5 mΩ cm2, respectively. Further improvement up to BV = 4000 V can be achieved by increasing the source-to-drain spacing to 32 μm with the specific on-resistance of RS = 35.5 mΩ cm2. The leakage current in the proposed devices stays in the range of ~5 × 10−9 mA mm−1.

Simulation of current collapse in the 0.25 µm gate Length Al 0.28 Ga 0.72 N/GaN HEMT

A 2D drift-diffusion (DD) and Hydrodynamic (HD) transport models within ATLAS simulation toolbox by Silvaco have been calibrated against experimental I-V characteristics of the 0.25μm gate length GaN High Electron Mobility Transistor (HEMT). The simulations take into account both piezoelectric and spontaneous polarization effects at the interface of AlGaN and GaN. The simulations have been employed to investigate the current collapse phenomenon that plays a key role in the output characteristics of a device which can significantly limit the output power. The current collapse is investigated using shallow acceptor traps in the both AlGaN and GaN layers.

Modelling and optimization of GaN capped HEMTs

The effect of GaN cap and its thickness on device performance is investigated using simulations by Silvaco Atlas toolbox. The simulations are based on meticulous calibration of a conventional, lateral, GaN capped, 1μm gate-length HEMT with a source-to-gate and gate-to-drain spacings of 2μm, and 3μm, respectively. The breakdown voltage of the GaN HEMT is improved by the aid of p-doped GaN cap and field plates to BV=630V showing an improvement of 540V in comparison to an unoptimized device. Furthermore, the possible creation of two dimensional hole gas (2DHG) at the interface of GaN cap and AlGaN barrier and its effect on the device behaviour is studied.

TCAD modelling of current dispersion in a 0.25 µm gate length GaN HEMT

Current dispersion due to acceptor-type defects acting as electron traps are studied using 2D TCAD transient simulations. High and low drain pulse voltages are applied to study a dynamic picture of trapping and de-trapping of electrons using Drift Diffusion and Hydrodynamic transport models. In addition, Schottky electron tunnelling is employed to transient simulations in the presence of different densities of traps in the barrier to investigate how tunnelling affects the drain current at off-state.

Dual-Drain GaN Magnetic Sensor Compatible With GaN RF Power Technology

This letter presents first-ever fabricated GaN split-current magnetic sensor device. Device operation and key manufacturing steps are also presented. The measured relative current sensitivity is constant at 14 % T−1 for wide mT range of the magnetic field. Constant sensitivity of a fabricated sensor can be attributed to device’s 2DEG nature, i.e., its high electron concentration and mobility, and very small layer thickness.

Analysis of GaN HEMTs Switching Transients Using Compact Model

This paper presents a methodology to model GaN power HEMT switching transients. Thus, a compact model to predict devices’ pulse switching characteristics and current collapse reliability issue has been developed. Parasitic RC subcircuits and a standard double-pulse switching tester to model intrinsic parasitic effects and to analyze power dissipation of GaN power HEMT are proposed and presented. Switching transient including gate-lag and drain-lag is predicted for ideal (without trap) and nonideal (with trap) devices. The results are validated by and compared to 2-D finite-element technology computer-aided design simulations. The original aim of this exercise is to develop a fast (near-real-time) model which can predict dynamic behavior of single and multiple power GaN HEMTs used for the switching transients of GaN power devices at circuit level.

Scaling and traps induced degradation of cutoff frequency in GaN HEMT

The effects of electric field induced traps generation in the drain access region is studied using industry standard TCAD, Atlas by Silvaco [1]. We show that the reduction in the cut-off frequency of the device from 13.9 (GHz) to 11.25 (GHz) could be linked to the electric field induced traps. We have used acceptor traps at an energy level of ET = Ev + 0.9 (eV), corresponding to substitutional carbon in GaN, and a concentration of NIT = 5 ×1017(cm-3) to model the induced traps. Although vertical scaling has been used to reduce short channel effects, we observe that this leads to a reduction in the current arising from the reduced ionised surface donors [2].

The effect of self-heating and electrical stress induced polarization in AlGaN/GaN heterojunction based devices

The effect of self-heating and polarisation is studied in AlGaN/GaN Transmission Line Measurement (TLM) structures with varying the contact spacing between the source and drain. The measurement results of the I-V characteristics are calibrated and investigated by TCAD Atlas-Silvaco. The self-heating simulations show a hotspot at the vicinity of the drain side. The electrical stress that is applied on the Ohmic contacts decreases the polarisation as the source-drain distance is reduced, causing the inverse piezoelectric effect.

GaN technology for power RF applications: Present reliability roadblocks and future trends

The current collapse and normally-on devices are the main roadblocks to the wider employment of the GaN technology. To explain the current collapse effect, surface and bulk trapping/de-trapping phenomena are modeled using 2D drift-diffusion and hydro-dynamic transport models by transient simulations within Silvaco TCAD. The current collapse next to 75% and 5% was observed due to surface and bulk trapping, respectively. The combined surface and bulk trapping is studied using a gate-lag technique showing a good qualitative agreement with experimental observations.