S. Hidalgo

Radiation effects in Low Gain Avalanche Detectors after hadron irradiations

Novel silicon detectors with charge gain were designed (Low Gain Avalanche Detectors - LGAD) to be used in particle physics experiments, medical and timing applications. They are based on a n++-p+-p structure where appropriate doping of multiplication layer (p^+) is needed to achieve high fields and impact ionization. Several wafers were processed with different junction parameters resulting in gains of up to 16 at high voltages. In order to study radiation hardness of LGAD, which is one of key requirements for future high energy experiments, several sets of diodes were irradiated with reactor neutrons, 192 MeV pions and 800 MeV protons to the equivalent fluences of up to Φeq=1016 cm−2. Transient Current Technique and charge collection measurements with LHC speed electronics were employed to characterize the detectors. It was found that the gain decreases with irradiation, which was attributed to effective acceptor removal in the multiplication layer. Other important aspects of operation of irradiated detectors such as leakage current and noise in the presence of charge multiplication were also investigated.

Analysis of Clamped Inductive Turnoff Failure in Railway Traction IGBT Power Modules Under Overload Conditions

This paper studies the overload turnoff failure in the insulated-gate bipolar transistor (IGBT) devices of power multichip modules for railway traction. After a detailed experimental analysis carried out through a dedicated test circuit, electrothermal simulations at device level are also presented. The simulation strategy has consisted in inducing a current and temperature mismatch in two IGBT cells. Results show that mismatches in the electrothermal properties of the IGBT device during transient operation can lead to uneven power dissipation, significantly enhancing the risk of failure and reducing the lifetime of the power module. Concretely, simulations qualitatively demonstrate that localized hot-spot formation due to a dynamic breakdown could lead to a second breakdown mechanism.

Analysis of hot-carrier degradation in a SOI LDMOS transistor with a steep retrograde drift doping profile

This paper reports the electrical performances of a RF SOI power LDMOS transistor with a retrograde doping profile in the entire drift region. A comparison between retrograde and conventional uniformly doped drift SOI power LDMOS transistors is provide by means of a numerical simulation analysis. The proposed structures exhibit better performances in terms of trapped electron distribution and transconductance degradation with no modification of the breakdown voltage capability. Simulation results show that, at a given bias conditions, the reduction of lateral electric field peak at the silicon surface due to the implementation of the retrograde doping profile accounts for the observed reduction of the hot carrier degradation effect.

IGBT module failure analysis in railway applications

This work reports two different characteristic patterns detected in IGBT chips failed in real operation (railway application) by failure analysis procedures. The analysed chips have been recovered from the rheostatic chopper leg and from the three legs which supplies the traction motor. It is observed that depending on the location and characteristics of the detected default (burn-out spot), this failure can be attributed to a latch-up process or a secondary breakdown mechanism. These results are corroborated with tests at limit, obtaining the same result. Consequently, each failure can be linked to overcurrent (latch-up) or overtemperature (secondary breakdown) events, which makes possible to distinguish between problems coming from driving strategies or thermal issues (uneven temperature distribution inside the module or packaging wear-out).

Lateral punch-through TVS devices for on-chip protection in low-voltage applications

A novel lateral punch-through TVS (Transient Voltage Suppressor) structure addressed to on-chip protection in very low voltage applications is reported in this paper. Different lateral TVS structures have been studied in order to optimize the electrical performances related with the surge protection capability. Lateral TVS structures with a four-layer doping profile exhibit the best electrical performances, as in the case of vertical TVS devices. The dependence of the basic electrical characteristics on the technological and geometrical parameters is also analysed. Finally, the electrical performances of lateral TVS structures are compared with those of vertical punch-through TVS devices and conventional Zener diodes, being the leakage current level reduced two orders of magnitude in the case of the lateral architecture. Lateral TVS structures exhibits similar performance than vertical counterparts with the advantage of easiest on-chip integration.

Simulation of Total Ionising Dose in MOS capacitors

Total Ionising Dose (TID) effects are the most important effects of ionising radiation in MOS devices. Among others, TID cause charge trapping in the oxide and in the oxide-semiconductor interface. In this work we develop physical simulation models of charge trapping TID effects in MOS capacitors, in order to have a calculation model for postirradiation experiments. Simulations are made using the Sentaurus TCAD suite, comparing results with well established literature. We calculate the modifications in the C-V curve and the dependence of the flat band voltage due to charge trapping in the oxide, interface traps and the combination of both for increasing dose.

Characterization and modeling of crosstalk and afterpulsing in Hamamatsu silicon photomultipliers

The crosstalk and afterpulsing in Hamamatsu silicon photomultipliers, called Multi-Pixel Photon Counters (MPPCs), have been studied in depth. Several components of the correlated noise have been identified according to their different possible causes and their effects on the signal. In particular, we have distinguished between prompt and delayed crosstalk as well as between trap-assisted and hole-induced afterpulsing. The prompt crosstalk has been characterized through the pulse amplitude spectrum measured at dark conditions. The newest MPPC series, which incorporate isolating trenches between pixels, exhibit a very low prompt crosstalk, but a small component remains likely due to secondary photons reflected on the top surface of the device and photon-generated minority carriers diffusing in the silicon substrate. We present a meticulous procedure to characterize the afterpulsing and delayed crosstalk through the amplitude and delay time distributions of secondary pulses. Our results indicate that both noise components are due to minority carriers diffusing in the substrate and that this effect is drastically reduced in the new MPPC series as a consequence of an increase of one order of magnitude in the doping density of the substrate. Finally, we have developed a Monte Carlo simulation to study the different components of the afterpulsing and crosstalk. The simulation results support our interpretation of the experimental data. They also demonstrate that trenches longer than those employed in the Hamamatsu MPPCs would reduce the crosstalk to a much greater extent.

Thermal calibration procedure for internal infrared laser deflection apparatus

A procedure to calibrate the temperature measurements in the transient regime of internal IR-laser deflection (IIR-LD) apparatus is presented. For this purpose, a thermal test chip (TTC), whose behavior is analytically well described by a simple model, is used. During the calibration process, the TTC is thermally excited during short heating times (up to 250μs), estimating its internal temperature profile by IIR-LD measurements. Afterwards, experimental results and model predictions are compared. Good agreement between theory and experiment is found when a temperature rise ranging from 0to1.4K is measured. The presented procedure can be also used to thermally calibrate optical probing apparatus for measuring the thermal behavior of power devices, as well as to determine thermal parameters of other materials, such as SiC and GaN. In particular, it should be very useful for the determination of the thermo-optical coefficient (∂n∕∂T)C of such materials. In the present work, a value for (∂n∕∂T)C of 2.0×10−4K−...

Optimisation of very low voltage TVS protection devices

Abstract This paper is aimed at the design and optimisation of advanced Transient Voltage Suppressors (TVS) devices for IC protection against ESD. A four-layer N+P+PN+ structure has been used to achieve breakdown voltages lower than 3 V. The effect of the critical geometrical and technological parameters on the TVS electrical characteristics is analysed with the aid of technological and electrical simulations. In this sense, the trade-off between voltage capability, leakage current and clamping voltage has been optimised. Fabricated TVS devices exhibit better electrical performances than those of the equivalent three-layer TVS device counterparts.

Recent technological developments on LGAD and iLGAD detectors for tracking and timing applications

Abstract This paper reports the latest technological development on the Low Gain Avalanche Detector (LGAD) and introduces a new architecture of these detectors called inverse-LGAD (iLGAD). Both approaches are based on the standard Avalanche Photo Diodes (APD) concept, commonly used in optical and X-ray detection applications, including an internal multiplication of the charge generated by radiation. The multiplication is inherent to the basic n++–p+–p structure, where the doping profile of the p+ layer is optimized to achieve high field and high impact ionization at the junction. The LGAD structures are optimized for applications such as tracking or timing detectors for high energy physics experiments or medical applications where time resolution lower than 30xa0ps is required. Detailed TCAD device simulations together with the electrical and charge collection measurements are presented through this work.