S. S. Deswal
Maharaja Agrasen Institute of Technology
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Publication
Featured researches published by S. S. Deswal.
ieee india international conference on power electronics | 2014
Sonam Rewari; R. S. Gupta; S. S. Deswal; Vandana Nath
In this paper, High Power Double Surrounding Gate(DSG) MOSFET with 4H-SiC as material has been studied. Also, the RF performance of DSG MOSFET has been investigated for various channel length and the results so obtained are compared with the conventional Surrounding Gate(SG) MOSFET, using ATLAS 3D device simulator. From the analysis, it is shown that cylindrical Double Surrounding Gate(DSG) MOSFET exhibits superior power and analog performance than conventional cylindrical Surrounding Gate(SG) MOSFET. DSG MOSFET has a number of desirable features, such as higher transducer power gain, better current gain, high on-state current, improved transconductance gm, high unity-gain frequency fT. The improvement is due to formation of two conducting paths because of the presence of two gates. Power has further been improved because Silicon Carbide has been used as material instead of Silicon.
2017 Devices for Integrated Circuit (DevIC) | 2017
Sonam Rewari; Vandana Nath; Subhasis Haldar; S. S. Deswal; R. S. Gupta
In this paper, a temperature dependent numerical model for Subthreshold region has been developed for Surface Potential, Subthreshold Current and Subthreshold Slope of GaN Junctionless (JNT) nanowire MOSFET. The effect of cryogenic temperature on the above parameters has been examined. The analytical results are found to be in good agreement with the simulated results. The performance of Gallium Nitride (GaN) based Junctionless (JNT) MOSFET at cryogenic temperatures has been presented and compared with conventional silicon and other compound semiconductor MOSFETs for channel length L = 18nm. Later the effect of temperature on the performance of GaN JNT has been studied. It is found that GaN based MOSFET shows higher drain currents, higher Ion/Ioff ratio and higher transconductance over other semiconductor materials. Also as the temperature increases the change in drain current and transconductance is minimum, so GaN based MOSFET is more immune to temperature variation.
2017 Devices for Integrated Circuit (DevIC) | 2017
Sonam Rewari; Vandana Nath; Subhasis Haldar; S. S. Deswal; R. S. Gupta
In this paper a Dual Metal Insulated Shallow Extension Gate All Around (DMISEGAA) MOSFET has been proposed to solve a big issue of Gate Inducted Drain leakage (GIDL) current in cylindrical Gate All Around (GAA) MOSFET for improved analog performance. DMISEGAA MOSFET improves gate leakages by minimizing the tunneling from Valence Band to Conduction Band so bringing down the gate induced drain leakages. DMISEGAA MOSFET has been compared with cylindrical Dual Metal Gate All Around (DMGAA) MOSFET and cylindrical Gate All Around (GAA) MOSFET. DMISEGAA MOSFET exhibits higher drain currents, higher transconductance and higher output conductance. It also poses Subthreshold Slope (SS) in proximity with the ideal value and an enhanced on state to off state current ratio (Ion/Ioff ratio). Higher frequency operation of DMISEGAA MOSFET over DMGAA MOSFET and GAA MOSFET has been directed by higher cutoff frequency (fT) of DMISEGAA MOSFET.
international conference on computational techniques in information and communication technologies | 2016
Sonam Rewari; Vandana Nath; Subhasis Haldar; S. S. Deswal; R. S. Gupta
In this paper, AC analysis of a novel Junctionless Double Surrounding Gate MOSFET for TeraHertz applications has been investigated and the results so obtained have been compared with the performance of Junctionless Transistor (JLT). AC performance parameters such as scattering parameters (S11, S12, S21, S22), cut off frequency, Gate Capacitance, Stern Stability Factor (K) and drain currents have been analyzed. The performance has also been analyzed for different channel lengths ( L= 18nm, 24nm, 30nm). JLDSG MOSFET is found to be suitable for Tera Hertz applications.
ieee uttar pradesh section international conference on electrical computer and electronics engineering | 2016
Nitin Trivedi; Manoj Kumar; Mridula Gupta; Subhasis Haldar; S. S. Deswal; Rashmi Gupta
This paper investigates the high-k spacer Junctionless Accumulation Mode (JLAM) Cylindrical Gate All Around (CGAA) MOSFET for improved electrical behavior and Analog/(RF) performance at 20 nm gate length. In the proposed device, the drive current (I<inf>ON</inf>) enhances due to Source/Channel barrier reduction and leakage current (I<inf>OFF</inf>) is reduced because of an effective increase in the physical channel length, due to fringing field effect caused by spacers. The impact of spacers on Analog/RF matrices such as I<inf>ON</inf>/I<inf>OFF</inf> ratio, transconductance (g<inf>m</inf>), Tansconductance Generation Factor (g<inf>m</inf>/I<inf>DS</inf>) TGF, intrinsic gain (g<inf>m</inf>/g<inf>d</inf>) and Subthreshold Slope (SS) is investigated in detail. The improvement in I<inf>ON</inf>/I<inf>OFF</inf> and reduced SS make it relevant for low power digital application.
ieee international nanoelectronics conference | 2016
Yogesh Pratap; Manoj Kumar; Mridula Gupta; Subhasis Haldar; Rashmi Gupta; S. S. Deswal
In recent time, a MOSFET based gas sensor has been widely used for low cost and high sensitive sensor for a wide range of industrial and domestic applications. In this paper, a gate-all-around Gas-sensing Junctionless Nanowire Transistor (G-JNT) with catalytic metal gate i.e. palladium (Pd) is proposed for the first time for high sensitivity and low power hydrogen gas detection using ATLAS-3D device simulator. Shift in channel potential, subthreshold current and in threshold voltage is used to predict the response of the sensor. Impact of silicon pillar radius, gate oxide width and gate length on the sensitivity of G-JNT has been investigated in details. Results exhibit that junctionless Transistor with catalytic metal gate is the suitable candidate for hydrogen molecule detection.
asia pacific microwave conference | 2016
Sonam Rewari; Vandana Nath; Subhasis Haldar; S. S. Deswal; R. S. Gupta
In this paper GaN based JLDSG MOSFET has been analyzed for the time for different channel lengths (L = 18 nm, 24 nm, 30 nm) for its high power (HP), high voltage (HV) and high frequency operation. The performance of JLDSG MOSFET has been compared with conventional Junctionless Surrounding Gate (JLSG) MOSFET. It is found that JLDSG MOSFET poses high drain current, transconductance, Subthreshold Slope, Transconductance Generation Factor (TGF), cut off frequency (fT), Maximum Transducer Power Gain (MTPG) and Unilateral Power Gain (UPG).
Superlattices and Microstructures | 2016
Sonam Rewari; Subhasis Haldar; Vandana Nath; S. S. Deswal; R. S. Gupta
International Journal of Numerical Modelling-electronic Networks Devices and Fields | 2016
Nitin Trivedi; Manoj Kumar; Subhasis Haldar; S. S. Deswal; Mridula Gupta; Rashmi Gupta
Superlattices and Microstructures | 2016
Nitin Trivedi; Manoj Kumar; Subhasis Haldar; S. S. Deswal; Mridula Gupta; R. S. Gupta