S. Taking

AlN/GaN MOS-HEMTs With Thermally Grown Al 2 O 3 Passivation

This paper reports on the processing and characterization of AlN/GaN metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs). The devices employ thermally grown Al2O3 as a gate dielectric and surface protection and passivation, which is an approach that provides an opportunity to define the ohmic contact areas by wet etching of Al (and optimization of this processing step) prior to the formation of Al2O3 and ohmic metal deposition. The devices also employ a new process technique that significantly suppresses leakage currents on the mesa sidewalls. Fabricated devices exhibited good direct current and radio frequency performance. A high peak current, i.e., ~ 1.5 A/mm, at VGS = +3 V and a current-gain cutoff frequency fT and maximum oscillation frequency fMAX of 50 and 40 GHz, respectively, were obtained for a device with 0.2-μm gate length and 100- μm gate width. Additionally, a robust method for the extraction of the small-signal equivalent circuit suitable for process optimization is described. It relies on intimate process knowledge and device geometry to determine equivalent circuit elements of the fabricated AlN/GaN MOS-HEMTs.

AlN/GaN MOS-HEMTs With Thermally Grown Passivation

This paper reports on the processing and characterization of AlN/GaN metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs). The devices employ thermally grown Al2O3 as a gate dielectric and surface protection and passivation, which is an approach that provides an opportunity to define the ohmic contact areas by wet etching of Al (and optimization of this processing step) prior to the formation of Al2O3 and ohmic metal deposition. The devices also employ a new process technique that significantly suppresses leakage currents on the mesa sidewalls. Fabricated devices exhibited good direct current and radio frequency performance. A high peak current, i.e., ~ 1.5 A/mm, at VGS = +3 V and a current-gain cutoff frequency fT and maximum oscillation frequency fMAX of 50 and 40 GHz, respectively, were obtained for a device with 0.2-μm gate length and 100- μm gate width. Additionally, a robust method for the extraction of the small-signal equivalent circuit suitable for process optimization is described. It relies on intimate process knowledge and device geometry to determine equivalent circuit elements of the fabricated AlN/GaN MOS-HEMTs.

AlN/GaN-Based MOS-HEMT Technology: Processing and Device Results

Process development of AlN/GaN MOS-HEMTs is presented, along with issues and problems concerning the fabrication processes. The developed technology uses thermally grown Al2O3 as a gate dielectric and surface passivation for devices. Significant improvement in device performance was observed using the following techniques: (1) Ohmic contact optimisation using Al wet etch prior to Ohmic metal deposition and (2) mesa sidewall passivation. DC and RF performance of the fabricated devices will be presented and discussed in this paper.

AlN/GaN MOS-HEMTs With Thermally Grown

This paper reports on the processing and characterization of AlN/GaN metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs). The devices employ thermally grown Al2O3 as a gate dielectric and surface protection and passivation, which is an approach that provides an opportunity to define the ohmic contact areas by wet etching of Al (and optimization of this processing step) prior to the formation of Al2O3 and ohmic metal deposition. The devices also employ a new process technique that significantly suppresses leakage currents on the mesa sidewalls. Fabricated devices exhibited good direct current and radio frequency performance. A high peak current, i.e., ~ 1.5 A/mm, at VGS = +3 V and a current-gain cutoff frequency fT and maximum oscillation frequency fMAX of 50 and 40 GHz, respectively, were obtained for a device with 0.2-μm gate length and 100- μm gate width. Additionally, a robust method for the extraction of the small-signal equivalent circuit suitable for process optimization is described. It relies on intimate process knowledge and device geometry to determine equivalent circuit elements of the fabricated AlN/GaN MOS-HEMTs.