Sabih H. Gerez

Fingerprint Matching by Thin-plate Spline Modelling of Elastic Deformations

This paper presents a novel minutiae matching method that describes elastic distortions in fingerprints by means of a thin-plate spline model, which is estimated using a local and a global matching stage. After registration of the fingerprints according to the estimated model, the number of matching minutiae can be counted using very tight matching thresholds. For deformed fingerprints, the algorithm gives considerably higher matching scores compared to rigid matching algorithms, while only taking 100 ms on a 1 GHz P-III machine. Furthermore, it is shown that the observed deformations are different from those described by theoretical models proposed in the literature.

Range-chart-guided iterative data-flow graph scheduling

An alternative method for the scheduling of iterative data-flow graphs is described. The method is based on the scheduling-range chart, which contains the information on the range within which each operation in the graph can be scheduled. The scheduling range is determined by considering the intraiteration and interiteration precedence relations. The goal is to find an optimal position within the scheduling range of each operation in such a way that some quality criteria (number of hardware resources, iteration period, latency, register lifetime) are optimized. A formal proof of the NP-completeness of the problem is given and two polynomial-time heuristics are introduced: fixed-rate (rate-optimal as a special case) scheduling where the number of hardware resources is optimized at the same time that a specific iteration period is guaranteed, and maximum-throughput scheduling with limited resources where the iteration period is optimized for a fixed number of processors. The algorithms are able to find optimal solutions for well-known benchmark examples. >

A polynomial time algorithm for the computation of the iteration-period bound in recursive data flow graphs

Rate-optimal scheduling of iterative data-flow graphs requires the computation of the iteration period bound. According to the formal definition, the total computational delay in each directed loop in the graph has to be calculated in order to determine that bound. As the number of loops cannot be expressed as a polynomial function of the number of modes in the graph, this definition cannot be the basis of an efficient algorithm. A polynomial-time algorithm for the computation of the iteration period bound based on longest path matrices and their multiplications is presented. >

Switchbox routing by stepwise reshaping

An algorithm for switchbox routing called PACKER is presented. In an initial phase, the connectivity of each net is established in a fast way without taking the other nets into account. In general, this gives rise to conflicts (short circuits). In the second stage the conflicts are removed iteratively using connectivity-preserving local transformations. They reshape a net by displacing one of its segments without disconnecting it from the net. The transformations are applied in a systematic way using a scan-line technique. During this process, a subset of the segments at the position of the scan line is densely packed in the (two) layers available for routing. The remaining segments are pushed to the next scan-line position. Scanning in the four available directions (left to right, right to left, top to bottom, and bottom to top) is performed until all conflicts have disappeared or no solution is found within a maximum number of iterations. It turns out that the new approach to routing, as implemented in PACKER, also has practical merits: most of the well-known benchmark examples are solved. >

An Intrinsic Coordinate System for Fingerprint Matching

In this paper, an intrinsic coordinate system is proposed for fingerprints. First the fingerprint is partitioned in regular regions, which are regions that contain no singular points. In each regular region, the intrinsic coordinate system is defined by the directional field. When using the intrinsic coordinates instead of pixel coordinates, minutiae are defined with respect to their position in the directional field. The resulting intrinsic minutiae coordinates can be used in a plastic distortion-invariant fingerprint matching algorithm. Plastic distortions, caused by pressing the 3-dimensional elastic fingerprint surface on a flat sensor, now deform the entire coordinate system, leaving the intrinsic minutiae coordinates unchanged. Therefore, matching algorithms with tighter tolerance margins can be applied to obtain better performance.

Elastic minutiae matching by means of thin-plate spline models

This paper presents a novel minutiae matching method that deals with elastic distortions by normalizing the shape of the test fingerprint with respect to the template. The method first determines possible matching minutiae pairs by means of comparing local neighborhoods of the minutiae. Next a thin-plate spline model is used to describe the non-linear distortions between the two sets of possible pairs. One of the fingerprints is deformed and registered according to the estimated model, and then the number of matching minutiae is counted. This method is able to deal with all possible non-linear distortions while using very tight bounding boxes. For deformed fingerprints, the algorithm gives considerably higher matching scores compared to rigid matching algorithms, while only taking 100 ms on a 1 GHz P-III machine.

Multicore soc for on-board payload signal processing

This paper introduces a new generic platform for onboard payload signal processing. The system is built up around an NoC with a bridge to an AMBA system which supports easy integration with existing AMBA based platforms. With the use of a pthreads interface the platform allows for simple programming and easy extension. For prototyping purposes, an implementation has been made on an FPGA together with a range of I/O options to assess its capabilities. SpaceWire and other interfaces support the extension of the demonstrator platform across multiple boards and allow to connect it to onboard networks and systems. This paper shows that novel and established chip architectures can be integrated in a way that combines their benefits, and represents a promising candidate architecture for future on-board processing platforms.

Achievements and Challenges in Fingerprint Recognition

This chapter gives an overview of fingerprint recognition. First, a number of applications of fingerprint recognition are presented, including physical access control, computer login, key-less lockers, and biometrie smart cards. This is followed by an overview of current fingerprint recognition technology and algorithms, introducing various new methods, technical challenges, and directions on how to solve them. Finally, this chapter shows how these new methods can be used to improve the performance of the selected applications.

PACKER: a switchbox router based on conflict elimination by local transformations

PACKER is an algorithm for switchbox routing, based on a novel approach. In an initial phase, the connectivity of each net is established without taking the other nets into account. In general, this gives rise to conflicts (short circuits). In the second stage, the conflicts are removed iteratively using connectivity-preserving local transformations. They reshape a net by displacing one of its segments without disconnecting it from the net. The transformations are applied in a asystematic way using a scan line technique. The results obtained by PACKER are very positive: it solves all well-known benchmark examples.<<ETX>>

Assignment of storage values to sequential read-write memories

Sequential read-write memories (SRWMs) are RAMs without an address decoder. A shift register is used instead to point at subsequent memory locations. SRWMs consume less power than RAMs of the same size. Algorithms are presented to check whether a set of storage values fits in a single SRWM and to automatically map storage values in as few SRWMs as possible. Benchmark results show that good assignments can be obtained in spite of the limited addressing capabilities.