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Sabine Schoeniger

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Publication

Featured researches published by Sabine Schoeniger.

Archive | 2001

Voltage pump with throw-in control mechanism

Stefan Dietrich; Thomas Hein; Patrick Heyne; Michael Markert; Thilo Marx; Torsten Partsch; Sabine Schoeniger; Peter Schroegmeier; Michael Sommer; Christian Weis; クリスチャン，ヴァイス; ザビーネ，シェーニガー; シュテファン，ディートリッヒ; ティロ，マルクス; トーマス，ハイン; トルステン，パルチュ; パトリック，ヘイネ; ペーター，シュレッグマイヤー; ミヒャエル，ゾンマー; ミヒャエル，マルケルト

Archive | 2001

Integrated memory with row access controller for activating and deactivating of row wirings

Stefan Dietrich; Thomas Hein; Patrick Heyne; Thilo Marx; Torsten Partsch; Sabine Schoeniger; Peter Schroegmeier; Michael Sommer; Christian Weis

Archive | 2001

Schaltungsanordnung mit einem Speicherfeld Circuit arrangement with a memory array

Peter Schroegmeier; Stefan Dietrich; Sabine Schoeniger; Christian Weis

Archive | 2001

Voltage pump with turn-on control

Stefan Dietrich; Patrick Heyne; Thilo Marx; Sabine Schoeniger; Michael Sommer; Thomas Hein; Michael Markert; Torsten Partsch; Peter Schroegmeier; Christian Weis

Archive | 2001

Integrierter Speicher mit Zeilenzugriffssteuerung zur Aktivierung und Vorladung von Zeilenleitungen und Verfahren zum Betrieb eines solchen Speichers Integrated memory with row access controller to activate and precharge of row lines and methods of operation of such a memory

Stefan Dietrich; Sabine Schoeniger; Peter Schroegmeier; Christian Weis

Archive | 2001

Verfahren und Vorrichtung zur Datenübertragung Method and apparatus for data transmission

Peter Schroegmeier; Stefan Dietrich; Sabine Schoeniger; Christian Weis

Archive | 2001

Verfahren und Vorrichtung zur Datenübertragung

Peter Schroegmeier; Stefan Dietrich; Sabine Schoeniger; Christian Weis

Archive | 2001

Integrierte Schaltung mit Testbetriebsart und Verfahren zum Testen einer Vielzahl solcher integrierter Schaltungen An integrated circuit comprising test mode and method of testing a plurality of such integrated circuits

Stefan Dietrich; Patrick Heyne; Thilo Marx; Sabine Schoeniger; Michael Sommer; Thomas Hein; Michael Markert; Torsten Partsch; Peter Schroegmeier; Christian Weis

Archive | 2001

Circuit arrangement having a memory array

Peter Schroegmeier; Stefan Dietrich; Sabine Schoeniger; Christian Weis

Archive | 2001

An integrated circuit comprising test mode and method for testing a plurality of such integrated circuits

Stefan Dietrich; Patrick Heyne; Thilo Marx; Sabine Schoeniger; Michael Sommer; Thomas Hein; Michael Markert; Torsten Partsch; Peter Schroegmeier; Christian Weis

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Peter Schroegmeier

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Stefan Dietrich

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Christian Weis

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Thilo Marx

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Thomas Hein

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Michael Markert

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Michael Sommer

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Patrick Heyne

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Torsten Partsch

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Musa Saglam

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