Sahel Abdinia

An Integrated 13.56-MHz RFID Tag in a Printed Organic Complementary TFT Technology on Flexible Substrate

This paper presents the first printed organic 13-MHz RFID on flexible substrate. The proposed solution includes a planar near field antenna bonded to an RFID tag, which is printed on flexible foil using an organic complementary TFT technology. Thanks to an active envelope detector, ASK modulation with modulation depth as low as 20% can be adopted to increase the available input power for the rectifier. The RFID functionality is demonstrated at the internally generated supply voltage of 24 V, for a reading range of 2-5 cm and a bit-rate up to 50 bit/s. With more than 250 transistors on the same foil, this work represents the most complex circuit ever published in a printed organic complementary TFT technology.

A 4b ADC manufactured in a fully-printed organic complementary technology including resistors

Organic transistors (OTFTs) can be printed on thin plastic substrates to obtain mechanically flexible large-area electronics with high throughput. Examples of applications include sensor-augmented RFIDs fabricated on the packaging of retail items and smart surfaces integrating sensors or actuators. Printed OTFTs have been used to design circuits [1-4], however, these implementations have been mainly limited to digital circuits or large-area switch matrices. A major challenge in the design of printed circuits is the relatively high variability in the characteristics of the OTFTs, which is caused by the low degree of spatial correlation typical of printing processes. A relatively high rate of hard faults is also typical in printed electronics (at the state of the art, yield is acceptable only for a circuit complexity of ~100 transistors).

High performance printed N and P-type OTFTs for complementary circuits on plastic substrate

This paper presents a printed organic complementary technology on flexible plastic substrate with high performance N and P-type Organic Thin Film Transistors (OTFTs), based on small-molecule organic semiconductors in solution. Challenges related to the integration of both OTFT types in a common complementary flow are addressed, showing the importance of surface treatments. Data on single devices and elementary complementary digital circuits (inverters and ring oscillators) are presented, demonstrating that a robust and reliable flow with high electrical performances can be established for printed organic devices.

Design of analog and digital building blocks in a fully printed complementary organic technology

The paper presents several analog and digital building blocks designed using OTFT devices manufactured in a fully-printed complementary organic technology. Circuit performance and parametric variability are simulated based on a model developed specifically for this technology. Fully-static logic gates and flip-flops as well as a low-area dynamic flip-flop enabled by the use of complementary OTFTs are measured, showing good agreement with simulations. A comparator exploiting offset cancellation techniques achieves a measured offset of less than 200mV. In addition, small-sized envelope detectors are measured at the HF RFID frequency (13.56MHz), to demonstrate the high frequency performance of the OTFTs. All these circuits are building blocks for the realization of a printed RFID tag.

30.4 A 13.56MHz RFID tag with active envelope detection in an organic complementary TFT technology

In the last several years, organic electronics have gained increasing consideration as a cost-effective alternative to silicon, especially in RFID applications. An inductive-coupled organic RFID operating at 13.56MHz was demonstrated on foil using p-type organic technologies [1]. A complementary organic technology was used for a 13.56MHz transponder in [2]. Recently, a complementary hybrid organic/metal-oxide process was exploited to demonstrate bidirectional communication in an HF RFID [3]. It adopts passive envelope detection using traditional diode-based schemes with OOK modulation. However, OOK modulation usually reduces sensitivity and reading range. In this work, a complementary organic TFT (C-OTFT) technology [4] is used for the first time to implement a 13.56MHz RX front-end, which exploits an active detection scheme and is able to demodulate ASK PWM-coded signals with modulation depth (h) as low as 25%.

Organic CMOS Line Drivers on Foil

In this paper, the design of a low-voltage line driver in a complementary organic technology on foil is presented. The behavior and the variability of circuits are predicted by means of transistor modeling and statistical characterization. The comparison of measurements and simulations of simple digital blocks verifies the effectiveness of the design approach. A transmission-gate based 32-stage line driver and a fully-static one are shown. It is also shown that, based on the statistical organic thin-film transistor (OTFT) characterization, the fully-static logic style is a more suitable choice for implementing line drivers in this technology. The implemented fully-static line driver, which is comprised of 1216 transistors, has the highest transistor count reported for a complementary organic circuit to date. It works at supply voltages from 10 V to as low as 3.3 V, reaching a 1 kHz clock frequency, and occupying an area of 25 ×4.7 mm2. The drivers are implemented in a technology compatible with that of flat-panel display backplanes and are tested with a QQVGA AMOLED display.

Design of Organic Complementary Circuits and Systems on Foil

This book describes new approaches to fabricate complementary organic electronics, and focuses on the design of circuits and practical systems created using these manufacturing approaches. The authors describe two state-of-the-art, complementary organic technologies, characteristics and modeling of their transistors and their capability to implement circuits and systems on foil. Readers will benefit from the valuable overview of the challenges and opportunities that these extremely innovative technologies provide. Demonstrates first circuits implemented using specific complementary organic technologies, including first printed analog to digital converter, first dynamic logic on foil and largest complementary organic circuit

Analog to digital converters on plastic foils

Circuits based on transistors which are manufactured at near-to-ambient temperatures on plastic foils are suited for mechanically flexible and large-area applications. Examples include bendable displays, large-area sensor surfaces for man-machine interfaces, and sensors-augmented RFIDs embedded in packaging material for food monitoring. This paper discusses circuit and system-level techniques that, minimizing the impact of the poor matching of organic transistors, enable analog to digital converters manufactured using unipolar and complementary organic technologies.

A LOW-VOLTAGE LOW-POWER 10-BIT 200 MS/S PIPELINED ADC IN 90 NM CMOS

This paper presents a low-power 10-bit 200 MS/s pipelined ADC in a 90 nm CMOS technology with 1 V supply voltage. To decrease the power dissipation efficiently, a new architecture using a combination of two power reduction techniques named double-sampling and opamp-sharing has been used to reduce the power consumption significantly, without any degradation in the performance of the ADC. In addition, the stage scaling technique has been applied to the ADC efficiently, and two-stage class A/AB and class A amplifiers and dynamic comparators have been used in sample and hold and sub-ADCs. According to HSPICE simulation results, the 10-bit 200 MSample/s pipeline ADC with a 9.375 MHz, 1-VP-P,diff input signal in a 90 nm CMOS process achieves a SNDR of 58.5 dB while consuming only 30.9 mW power from a 1 V supply voltage.

A new architecture for low-power high-speed pipelined ADCs using double-sampling and opamp-sharing techniques

This paper presents a low-voltage low-power pipelined ADC with 1V supply voltage in a 90nm CMOS process. A new architecture is proposed to reduce the power consumption in high-speed pipelined analog-to-digital converters (ADCs). The presented architecture utilizes a combination of two current power-reduction techniques, double sampling and amplifier sharing. To decrease the power dissipation more efficiently, the stage scaling technique has been applied to the ADC and dynamic comparators have been used in sub-ADCs. Using this approach, a 10-bit 200MSample/s pipelined ADC has been designed in a 90nm CMOS technology. HSPICE simulation results show a signal-to-noise plus distortion ratio (SNDR) of 58.5dB with a 9.375MHz, 1-VP-P,diff input signal while consuming only 30.9mW power from a 1V supply voltage.