Sahil Shah

A Programmable and Configurable Mixed-Mode FPAA SoC

This paper presents a floating-gate (FG)-based, field-programmable analog array (FPAA) system-on-chip (SoC) that integrates analog and digital programmable and configurable blocks with a 16-bit open-source MSP430 microprocessor (μP) and resulting interface circuitry. We show the FPAA SoC architecture, experimental results from a range of circuits compiled into this architecture, and system measurements. A compiled analog acoustic command-word classifier on the FPAA SoC requires 23 μW to experimentally recognize the word dark in a TIMIT database phrase. This paper jointly optimizes high parameter density (number of programmable elements/area/process normalized), as well as high accessibility of the computations due to its data flow handling; the SoC FPAA is 600 000 × higher density than other non-FG approaches.

Flexible ISFET Biosensor Using IGZO Metal Oxide TFTs and an ITO Sensing Layer

This letter presents the fabrication details and measured performance of a prototype flexible extended-gate ion-sensitive field effect transistor (ISFET) biosensor, manufactured using a metal oxide indium-gallium-zinc oxide thin film transistor and an indium-tin oxide sensing layer on a 125- μm thick flexible plastic substrate. ISFET drain current was shown to respond correctly to the pH buffer concentration with repeatable pH sensitivity observed over multiple cycles. These results demonstrate the initial viability of directly extending flexible plastic substrate organic light emitting diode display technology to the production of low-cost, plastic ISFET biosensors.

Experimental and Simulated Cycling of ISFET Electric Fields for Drift Reset

We demonstrate the cycling of electric fields within an ion-sensitive field-effect transistor (ISFET) as a method to control drift. ISFETs had a repeatable drift pattern when cycling the vertical electric field by changing the voltage between the reference electrode and the substrate. Cycling the horizontal electric field, the voltage between the drain and source of the device, showed no effect, causing the device to continue to drift as it would during normal operation. Results were confirmed with multiple pH buffer solutions. An ISFET was modeled using ATHENA. The simulation included the electrolyte modeled as a modified intrinsic semiconductor. Empirical results are confirmed with device-level simulations of an ISFET using Silvaco TCAD. The model produced a scaled current of 90 μA, which is of similar order to the experimental values of 146 μA. The repeatable drift behavior could be easily reconciled to permit the use of ISFETs for long-term continuous monitoring applications.

Reconfigurable analog classifier for knee-joint rehabilitation

We present a System-On-Chip Field Programmable Analog Array (FPAA) for analyzing and processing the signals off an accelerometer for a wearable joint health assessment device. FPAAs have been shown to compute with an efficiency of 1000 times, as well as area efficiencies of 100 times, more than digital solutions. This work presents a low power signal processing system which allows us to extract features from the output of the accelerometer. These features are used by the classifier, implemented using a vector matrix multiplication and a two output 1-winner-take-all, to detect flexion and extension cycles in the subject. The compiled design consumes 0.636 μW of power for the front end analog signal processing chain where as the single layer classifier uses 13 μW of power. Thus the system is highly suitable for wearable applications where power consumption is a major concern. The current FPAA is fabricated in a 0.35 μm CMOS process and is operated at a power supply of 2.5 volts. The Gm-C filters and other circuits are operated in the subthreshold regime of the transistor to obtain the highest transconductance to current ratio offered by the process.

Transforming mixed-signal circuits class through SoC FPAA IC, PCB, and toolset

We present a SoC large-scale Field Programmable Analog Array (FPAA) test system, enabled by configurable analog-digital ICs to create a simple interface for a wide range of experiments in classroom environments. This configurable system appears as a simple digital peripheral using a standard USB interface for communication and power. Combined with a high-level tool flow for on-chip application design, this FPAA device demonstrates a number of mixed-signal computations, classification, and signal processing and its impact on hands-on circuit instruction.

Pulse width modulation circuit for ISFET drift reset

We present the simulation results for a Pulse Width Modulation (PWM) circuit (to be fabricated in a 0.5 μm CMOS process) used to cycle the electric field in an Ion Sensitive Field Effect Transistor (ISFET). Vertical electric field, which controls the inversion layer in a field effect transistors, can be used to reset the inherent drift behavior of ISFET. A PWM circuit, to cycle the vertical field, enables us to precisely monitor the pH of an electrolyte without needing to manually calibrate the ISFET. Two or more ISFETs could be used with the devices alternatively being placed in reset and measurement mode. By combining the outputs from measurement phase of the devices, we can read the pH of the electrolyte continuously. The PWM circuit is composed of a 10.9 kHz ring oscillator, five divider circuits giving a 100,000 frequency division, a 6 bit counter, and a Digital to Analog Converter (DAC) that feeds into a comparator whose output selects the mode of operation for the ISFETs.

Calibration of Floating-Gate SoC FPAA System

We present a calibration flow for a large-scale floating-gate (FG) system-on-chip field programmable analog array. We focus on characterizing the FG programming infrastructure and hot-electron injection parameters, MOSFET parameters using the EKV model, and calibrating digital-analog converters and analog-digital converters. In addition, threshold voltage mismatches on FG devices due to their indirect structure are characterized using on-chip measurement techniques. The calibration results in enabling a digital approach, where a design can be programmed without having to deal with the local and global mismatches, on a reconfigurable analog system. This paper shows the results of a compiled nonlinear classifier block comprising a vector-matrix-multiplier and a winner-takes-all on three different calibrated chips.

Demonstration of spike timing dependent plasticity in CBRAM devices with silicon neurons

Spike timing dependent plasticity (STDP) is an important neural process that enables biological neural networks to learn by strengthening or weakening synaptic connections between neurons. This work presents simulation results and post-silicon experimental data that demonstrate for the first time the possibility of tuning the on state resistance of a type of emerging resistive memory device known as conductive bridge random access memory (CBRAM) in accordance with the biological STDP rule for neuromorphic applications. STDP behavior is demonstrated for CBRAM devices integrated with CMOS spiking neuron circuitry through back end of line post-processing for different initial resistance values and spike durations.

Disposable point-of-use optical biosensor for multiple biomarker detection

This work explored the viability of a new miniaturized fluorescence measurement-based sensor architecture using organic light emitting diode (OLED) display and photodiode active matrix array technology for point-of-use diagnosis of multiple disease biomarkers in a low cost disposable configuration. Sensor feasibility and optical performance were evaluated using a bright 0.3mW/mm2 2 × 2 mm, 455nm blue OLED emitter test structure configured first with orthogonally crossed linear polarizing film; and second, with band-pass and long-pass optical filters. Preliminary measurement results indicated that this type of sensor architecture requires optical filters to approach the sensitivity of laboratory fluorescence-based instrumentation.

A proof-of-concept classifier for acoustic signals from the knee joint on a FPAA

A proof-of-concept low-power analog classifier for assessing acoustic signals from the knee joint on a reconfigurable Field Programmable Analog Array (FPAA) is presented in this paper. Knee joint sounds are measured using piezoelectric (contact) microphones and processed using the front end analog filters. A single layer of neural network composed of Vector Matrix Multiplication (VMM) and Winner-Take All (WTA) is used for the classification. A simple classifier detecting an anterior cruciate ligament injury is implemented here. Measurement from a single subjects healthy and injured knees are used here as an input. The FPAA is fabricated in a 350nm CMOS process. A bank of 12 parallel filters is used for feature extraction and a 12×2 VMM-WTA is used as a classifier. The compiled system, front-end and the classifier, consumes a power of 15.29μW with a power supply of 2.5 V.