Sihwan Kim

A Programmable and Configurable Mixed-Mode FPAA SoC

This paper presents a floating-gate (FG)-based, field-programmable analog array (FPAA) system-on-chip (SoC) that integrates analog and digital programmable and configurable blocks with a 16-bit open-source MSP430 microprocessor (μP) and resulting interface circuitry. We show the FPAA SoC architecture, experimental results from a range of circuits compiled into this architecture, and system measurements. A compiled analog acoustic command-word classifier on the FPAA SoC requires 23 μW to experimentally recognize the word dark in a TIMIT database phrase. This paper jointly optimizes high parameter density (number of programmable elements/area/process normalized), as well as high accessibility of the computations due to its data flow handling; the SoC FPAA is 600 000 × higher density than other non-FG approaches.

Integrated Floating-Gate Programming Environment for System-Level ICs

We present the first integrated system to handle heterogeneously used and programmed floating-gate (FG) elements in a single modular approach. We focus on IC design, integration, characterization, and algorithmic development of an integrated FG programming system for a large-scale field-programmable analog array. We work through tunneling approaches to initialize the FG devices for precision programming, as well as hot-electron injection approaches for precise device programming.

Transforming mixed-signal circuits class through SoC FPAA IC, PCB, and toolset

We present a SoC large-scale Field Programmable Analog Array (FPAA) test system, enabled by configurable analog-digital ICs to create a simple interface for a wide range of experiments in classroom environments. This configurable system appears as a simple digital peripheral using a standard USB interface for communication and power. Combined with a high-level tool flow for on-chip application design, this FPAA device demonstrates a number of mixed-signal computations, classification, and signal processing and its impact on hands-on circuit instruction.

Calibration of Floating-Gate SoC FPAA System

We present a calibration flow for a large-scale floating-gate (FG) system-on-chip field programmable analog array. We focus on characterizing the FG programming infrastructure and hot-electron injection parameters, MOSFET parameters using the EKV model, and calibrating digital-analog converters and analog-digital converters. In addition, threshold voltage mismatches on FG devices due to their indirect structure are characterized using on-chip measurement techniques. The calibration results in enabling a digital approach, where a design can be programmed without having to deal with the local and global mismatches, on a reconfigurable analog system. This paper shows the results of a compiled nonlinear classifier block comprising a vector-matrix-multiplier and a winner-takes-all on three different calibrated chips.

A remote FPAA system for research and education

We present a novel remote test system, enabled by configurable analog-digital ICs to create a simple interface for a wide range of experiments, whether in research or educational directions. Our remote test system utilizes a nearly identical setup to the existing large-scale Field Programmable Analog Array (FPAA) toolset; a mixed-mode configurable system with a common digital interface (e.g. USB) enables a nearly seamless transition. The system overhead requirements are straightforward, requiring simple email handling, available over almost all network systems with no additional requirements. We present using the FPAA devices and baseline tool framework, present overview examples for the remote system.

SoC FPAA immersed junior level circuits course

We present our junior level class implementation moving from classical discrete circuit concept towards system level design. This approach was enabled using large-scale Field Programmable Analog Arrays (FPAA) (ECE 3400). The approach enables a first junior level transistor circuit course to build and verify system level designs. This course heavily utilized remote FPAA designs for their hands-on projects; the resulting class data usage generated by this system gives some information on class behavior. This discussion presents the implementation, analysis, and early assessment data for this first semester class.

Floating-gate FPAA calibration for analog system design and built-in self test

We present a calibration flow for a large-scale Floating-Gate (FG) System-on-Chip (SoC) Field Programmable Analog Array (FPAA) to enable analog system design and built-in self test. We focus on calibration of the FG programming infrastructure, Digital-Analog Converters (DAC) and Analog-Digital Converters (ADC), as well as characterization of hot-electron injection parameters. This paper shows the results of a compiled Winner-Take-All (WTA) circuit on three different calibrated chips.

Live demonstration: FPAA Demonstration Controlled through Android-Based Device

This document describes the live demonstration of FPAA Demonstration Controlled through Android-Based Device1. This demonstration requires no additional resources other than the basic resources (power plug, a table and pin wall) to be provided to each demonstration 2. The demonstration will use a Google Nexus 7 tablet and a RASP 3.0 board (most likely multiple boards), which the authors will transport. The demonstration application to interface with the board runs on the tablet, as well as laptops, to show the relevant design tools to interested users. This application could be downloaded to individual devices (our long term plan), although it is harder to predict if these options will be ready during the demonstration.

SoC FPAA IC, PCB, and tool demonstration

This demonstration presents live hands-on experience of the System on Chip (SoC) large-scale Field Programmable Analog Array (FPAA) IC [1] through a complete PC Board and high-level tool interface [2]. Figure 1a shows the demonstration requires only basic power connection to the laptop The hardware includes an FPAA demonstration board and a Digilent USB device to enable a scope / function generator functionality.

Demonstration of a remote FPAA system for research and education

Figure 1 illustrates part of the user experience of the remote test system for this demonstration. This demonstration requires only basic resources (power plug and table), utilizing a wireless network as available. Participants can experience both sides of the remote system, one laptop running the remote system and infrastructure, and a second laptop (or more) only running the resulting tools and taking experimental data. Participants can try different circuits among many options already available for the user to use or modify.