Sam Vaziri

Efficient Inkjet Printing of Graphene

An efficient and mature inkjet printing technology is introduced for mass production of coffee-ring-free patterns of high-quality graphene at high resolution (unmarked scale bars are 100 μm). Typically, several passes of printing and a simple baking allow fabricating a variety of good-performance electronic devices, including transparent conductors, embedded resistors, thin film transistors, and micro-supercapacitors.

Electromechanical Piezoresistive Sensing in Suspended Graphene Membranes

Monolayer graphene exhibits exceptional electronic and mechanical properties, making it a very promising material for nanoelectromechanical devices. Here, we conclusively demonstrate the piezoresistive effect in graphene in a nanoelectromechanical membrane configuration that provides direct electrical readout of pressure to strain transduction. This makes it highly relevant for an important class of nanoelectromechanical system (NEMS) transducers. This demonstration is consistent with our simulations and previously reported gauge factors and simulation values. The membrane in our experiment acts as a strain gauge independent of crystallographic orientation and allows for aggressive size scalability. When compared with conventional pressure sensors, the sensors have orders of magnitude higher sensitivity per unit area.

A Graphene-Based Hot Electron Transistor

We experimentally demonstrate DC functionality of graphene-based hot electron transistors, which we call graphene base transistors (GBT). The fabrication scheme is potentially compatible with silicon technology and can be carried out at the wafer scale with standard silicon technology. The state of the GBTs can be switched by a potential applied to the transistor base, which is made of graphene. Transfer characteristics of the GBTs show ON/OFF current ratios exceeding 10(4).

Residual Metallic Contamination of Transferred Chemical Vapor Deposited Graphene

Integration of graphene with Si microelectronics is very appealing by offering a potentially broad range of new functionalities. New materials to be integrated with the Si platform must conform to stringent purity standards. Here, we investigate graphene layers grown on copper foils by chemical vapor deposition and transferred to silicon wafers by wet etching and electrochemical delamination methods with respect to residual submonolayer metallic contaminations. Regardless of the transfer method and associated cleaning scheme, time-of-flight secondary ion mass spectrometry and total reflection X-ray fluorescence measurements indicate that the graphene sheets are contaminated with residual metals (copper, iron) with a concentration exceeding 10(13) atoms/cm(2). These metal impurities appear to be partially mobile upon thermal treatment, as shown by depth profiling and reduction of the minority charge carrier diffusion length in the silicon substrate. As residual metallic impurities can significantly alter electronic and electrochemical properties of graphene and can severely impede the process of integration with silicon microelectronics, these results reveal that further progress in synthesis, handling, and cleaning of graphene is required to advance electronic and optoelectronic applications.

A Comprehensive Graphene FET Model for Circuit Design

During the last years, graphene-based field-effect transistors (GFETs) have shown outstanding RF performance; therefore, they have attracted considerable attention from the electronic devices and circuits communities. At the same time, analytical models that predict the electrical characteristics of GFETs have evolved rapidly. These models, however, have a complexity level that can only be handled with the help of a circuit simulator. On the other hand, analog circuit designers require simple models that enable them to carry out fast hand calculations, i.e., to create circuits using small-signal hybrid - π models, calculate figures of merit, estimate gains, pole-zero positions, and so on. This paper presents a comprehensive GFET model that is simple enough for being used in hand calculations during circuit design and at the same time, it is accurate enough to capture the electrical characteristics of the devices in the operating regions of interest. Closed analytical expressions are provided for the drain current ID, small-signal transconductance gain gm, output resistance ro, and parasitic capacitances Cgs and Cgd. In addition, figures of merit, such as intrinsic voltage gain AV, transconductance efficiency gm/ID, and transit frequency fT are presented. The proposed model has been compared to a complete analytical model and also to measured data available in current literature. The results show that the proposed model follows closely to both the complete analytical model and the measured data; therefore, it can be successfully applied in the design of GFET analog circuits.

A simple route towards high-concentration surfactant-free graphene dispersions

A simple solvent exchange method is introduced to prepare high-concentration and surfactant-free graphene liquid dispersion. Natural graphite flakes are first exfoliated into graphene in dimethylformamide (DMF). DMF is then exchanged by terpineol through distillation, relying on their large difference in boiling points. Graphene can then be concentrated thanks to the volume difference between DMF and terpineol. The concentrated graphene dispersions are used to fabricate transparent conductive thin films, which possess comparable properties to those prepared by more complex methods.

A manufacturable process integration approach for graphene devices

We experimentally demonstrate DC functionality of graphene-based hot electron transistors, which we call Graphene Base Transistors (GBT). The fabrication scheme is potentially compatible with silicon technology and can be carried out at the wafer scale with standard silicon technology. The state of the GBTs can be switched by a potential applied to the transistor base, which is made of graphene. Transfer characteristics of the GBTs show ON/OFF current ratios exceeding 50.000.

Piezoresistive Properties of Suspended Graphene Membranes under Uniaxial and Biaxial Strain in Nanoelectromechanical Pressure Sensors

Graphene membranes act as highly sensitive transducers in nanoelectromechanical devices due to their ultimate thinness. Previously, the piezoresistive effect has been experimentally verified in graphene using uniaxial strain in graphene. Here, we report experimental and theoretical data on the uni- and biaxial piezoresistive properties of suspended graphene membranes applied to piezoresistive pressure sensors. A detailed model that utilizes a linearized Boltzman transport equation describes accurately the charge-carrier density and mobility in strained graphene and, hence, the gauge factor. The gauge factor is found to be practically independent of the doping concentration and crystallographic orientation of the graphene films. These investigations provide deeper insight into the piezoresistive behavior of graphene membranes.

Bias-temperature instability in single-layer graphene field-effect transistors

We present a detailed analysis of the bias-temperature instability (BTI) of single-layer graphene field-effect transistors (GFETs). We demonstrate that the dynamics can be systematically studied when the degradation is expressed in terms of a Dirac point voltage shift. Under these prerequisites it is possible to understand and benchmark both NBTI and PBTI using models previously developed for Si technologies. In particular, we show that the capture/emission time (CET) map approach can be also applied to GFETs and that recovery in GFETs follows the same universal relaxation trend as their Si counterparts. While the measured defect densities can still be considerably larger than those known from Si technology, the dynamics of BTI are in general comparable, allowing for quantitative benchmarking of the graphene/dielectric interface quality.

Simulation of DC and RF Performance of the Graphene Base Transistor

We examined the DC and RF performance of the graphene base transistor (GBT) in the ideal limit of unity common base current gain. To this purpose, we developed a model to calculate the current-voltage characteristics of GBTs with semiconductor or metal emitter taking into account space charge effects in the emitter-base and base-collector dielectrics that distort the potential profile and limit the upper value of fT. Model predictions are compared with available experiments. We show that, in spite of space charge high current effects, optimized GBT designs still hold the promise to achieve intrinsic cutoff frequency in the terahertz region, provided that an appropriate set of dielectric and emitter materials is chosen.