Samuel C. Wood

Simple performance models for integrated processing tools

Integrated processing tools are becoming increasingly prevalent in modern fabs. Integrated tools consist of several process modules connected around a central handler such that the modules can process several wafers from the same lot simultaneously. Lithography cells and vacuum cluster tools are examples of integrated processors. Simple, intuitive models of the cycle time, throughput, and wafer cost of integrated tools are introduced. The models use two measurable parameters that aggregate tool operations: the incremental cycle time is the average increase in cycle time resulting from a lot size increment of one wafer and the fixed cycle time is the portion of cycle time that is independent of lot size. One example shows how an empirical analysis of a commercial CVD cluster tool was used with the models to identify opportunities to increase tool throughput. In a second example, analytical models of the incremental and fixed cycle times are used to provide insight into the effects of tool configuration on performance. Finally, simulations of single integrated tools are used to show some limitations of the model.

Systems of multiple cluster tools: configuration, reliability, and performance

The migration of semiconductor processes to single-wafer vacuum cluster tools has rendered configuration an important decision variable in fab operation and heightened the impact of reliability on fab performance. We address these closely linked issues by deriving the optimal configuration and operation of systems of cluster tools in the presence of scheduled maintenance. The two extremes in the spectrum of possible configurations are the serial configuration, in which the modules in a tool are all different, each representing a step in a process sequence, and the parallel configuration, in which each tool is assigned only one process step. We predict that the latter can offer higher throughputs. However, this advantage may be slight when equipment downtime is relatively schedulable and infrequent, in which the case the serial configuration may be preferable because of its superior cycle times. We also derive optimal lot sizing and release policies for systems of cluster tools. We conclude that fabs will gradually migrate from parallel configurations to serial as cluster tools become more reliable and cycle time becomes more important.

Cost and cycle time performance of fabs based on integrated single-wafer processing

Visions of future wafer fabs include the use of integrated single-wafer processors to achieve fast cycle times and contain rising production costs. A survey of IC manufacturers, equipment vendors, and IC manufacturing literature was used to generate hypothetical conventional and alternative fabs to evaluate the effect of integrated single-wafer processing on cycle time and cost performance. The distinguishing features of the alternative fab are: (1) all thermal processes performed on single-wafer processors; (2) back-end net cleans performed on single-wafer processors; (3) integration of single-wafer processors into clusters or cells wherever practical, and (4) extensive use of in situ process monitors to replace in-line process monitors. Modeling and simulation of the resulting fabs suggest that integrated single-wafer processing can reduce the cycle time of conventional fabs by about 50% without having a significant effect on wafer production test. Tool integration and single-wafer processing must be used together to achieve these performance improvements. Although traditional lot sizes appeared to be appropriate for both fabs, improvements in cluster tool reliability and process step similarity could change optimal integrated tool configurations and reduce optimal lot sizes in the future.

Modeling the performance of cluster-based fabs

The economic performance of cluster tools is evaluated by modeling a hypothetical cluster-based fab, where almost all of a 0.6- mu m DRAM (dynamic random-access memory) process flow is performed in cluster tools. A conventional fab under the same cost constraint running the same flow is also modeled as a base for comparison. From this model, a number of inherent differences between cluster-based fabs and conventional fabs are observed and described. Monte Carlo cost-based simulations are then run on the two fabs to compare the potential cost and throughput time performance of the fabs. Results suggest that the cluster-based fab can operate at considerably reduced throughput times for a relatively small cost per wafer premium. Modeling the cluster-based fab revealed a number of fab design and management issues that are much less significant or nonexistent for conventional fabs. These issues include configuration and scheduling, lot size, and scaling the fab.<<ETX>>

Rapid thermal multiprocessing for a programmable factory for adaptable manufacturing of ICs

This paper presents an overview of research at Stanford University on the development of concepts of a programmable factory, based on a new generation of flexible multifunctional equipment implemented in a smaller flexible factory. This approach is demonstrated through the development of a novel single wafer Rapid Thermal Multiprocessing (RTM) reactor with extensive integration of sensors, computers and related technology for specification, communication, execution, monitoring, control, and diagnosis to demonstrate the programmable nature of the RTM. The RTM combines rapid thermal processing and several other process environments in a single chamber, with applications for multilayer in-situ growth and deposition of dielectrics, semiconductors and metals. Because it is highly instrumented, the RTM is very flexible for in-situ multiprocessing, allowing rapid cycling of ambient gases, temperature, pressure, etc. It allows several processing steps to be executed sequentially in-situ, while providing sufficient flexibility to allow optimization of each processing step. This flexibility is partially the result of a new lamp system with three concentric rings each of which is independently and dynamically controlled to provide for better control over the spatial and temporal optical flux profile resulting in excellent temperature uniformity over a wide range of process conditions namely temperatures, pressures and gas flow rates. The lamp system has been optimally designed through the use of a newly developed thermal simulator. For equipment and process control, a variety of sensors for real-time measurements and a model based control system have been developed. >

A generic model for cluster tool throughput time and capacity

The throughput time within a cluster tool can be approximated as T+lt, where T is the fixed throughput time of the cluster, l is the lot size, and t is the average incremental throughput time resulting from a lot size increase of one wafer. Simulations of different cluster tools are used to illustrate and validate the model. The fixed throughput time (T) consists of both an external component associated with loadlock operations such as loading and pumping, and an internal component resulting from dynamic effects such as congestion in the cluster tool. The expressions for the incremental throughput time (t) includes the wafer handling time, and may include the module processing time. This model predicts that the maximum throughput rate of the cluster tool is 1/t, and that this throughput rate can only be achieved if multiple lots can simultaneously access the cluster tool. The model also predicts that this number of lots must increase, for example, as lot size decreases, the number of identical modules on a cluster increases, or lot loading time increases. This model was applied to a CVD cluster tool at Intel Corporation. The model predicted an increase in the clusters throughput rate of roughly 10% over current operating practice, if one lot could be loaded while a different lot was being processed. The model was verified using a simulator and then on the cluster tool itself.

Simple cost models of high-process-mix wafer fabs at different capacities

A simple equation-based model of wafer cost as a function of fab capacity is derived by splitting fixed costs into capacity-dependent and capacity-independent components. Simple approximations are presented for these terms. Our model uses Sematech data to show how the following phenomena can be measured: 1) increasing process diversity motivates larger fabs; 2) dedicating tools to eliminate setups motivates larger fabs; 3) slow, cheap, versatile tools are better than fast, expensive, dedicated tools when implementing flexible minifabs.

Single Wafer Rapid Thermal Multiprocessing

Future success in microelectronics will demand rapid innovation, rapid product introduction and ability to react to a change in technological and business climate quickly. These technological advances in integrated electronics will require development of flexible manufacturing technology for VLSI systems. However, the current approach of establishing factories for mass manufacturing of chips at a cost of more than 200 million dollars is detrimental to flexible manufacturing. We propose concepts of a micro factory which may be characterized by more economical small scale production, higher flexibility to accommodate many products on several processes, and faster turnaround and learning. In-situ multiprocessing equipment where several process steps can be done in sequence may be a key ingredient in this approach. For this environment to be flexible, the equipment must have ability to change processing environment, requiring extensive in-situ measurements and real time control. In this paper we describe the development of a novel single wafer Rapid Thermal Multiprocessing (RTM) reactor for next generation flexible VLSI manufacturing. This reactor will combine lamp heating, remote microwave plasma and photo processing in a single cold-wall chamber, with applications for multilayer in-situ growth and deposition of dielectrics, semiconductors and metals.

Temperature Uniformity Optimization Using Three-Zone Lamp and Dynamic Control in Rapid Thermal Multiprocessor

Rapid thermal processing (RTP) can play an important role in in situ single-wafer thermal multiprocessing, since it allows for a rapid wafer throughput rate. Conventional dedicated RTP equipment, where temperature uniformity is achieved by optimized reflector and chamber geometries for a specific process, typically cannot provide uniformity for different processes, or for a range of processing conditions. In this work we present a new flexible lamp system, in which tungsten-halogen lamps are configured in three concentric rings that are independently and dynamically controlled. The resultant circularly symmetric flux, which can be varied and controlled both temporally and spatially, offers significantly improved temperature uniformity. This is demonstrated using thermocouples as well as actual processes such as implant annealing, thermal oxidation and chemical vapor deposition of silicon. Through added flexibility and more precise control, this approach offers a powerful tool for multiprocessing and rapid process prototyping.

The impact of tool delivery times on the optimal capacity and value of semiconductor wafer fabs

The objective of this work is to provide insight into the sources and magnitude of the costs that result from lost market responsiveness due to long capacity lead times. A model has been developed to determine the impact of tool lead times on the expected present value of monolithic fabs and modular a fab over the fab lifetime. The model makes the following assumptions and approximations: Demand follows a random walk characterized by a known drift rate and volatility; Capacity lead times are known in advance longer capacity lead times result in tools being ordered earlier than tools with late lead times; Management has the option of sparsely populating a fab initially and then adding additional tools as needed. This is referred to as a modular fab. Cost parameters representing modern 200 mm wafer fabs are used. Based on the above assumptions optimal capacity expansion schedules are numerically generated. Initial results show that as capacity lead times get shorter, initial fab size is likely to be smaller and future capacity additions are likely to become more frequent. If capacity lead times are short, fab capacities can be more accurately matched to demand, achieving higher expected revenues. The increase in revenues can be used to evaluate the financial value of shorter capacity lead times.