Sang Muk Lee

Secure communication system for wearable devices wireless intra body communication

This paper explains how intra-body communication can be used to establish a secure communication channel for wearable devices. Intra-body communication transfers data using the human body as its conductor. This paper describes a secure communication system that supports multiple wearable slave devices. Our prototype, wearable on the wrist, has an integrated processor to control the intra-body communication module. Instead of using radio transmission, the module uses the human body, thus maximizing the security of transmitted signals.

Compression Accelerator for Hadoop Appliance

In this paper, we propose an accelerator for Hadoop appliances. Data servers receive significant data traffic because of several services based on networks. Processing such big data requires sufficient communication bandwidth for big data management. In order to increase communication bandwidth, compression algorithms are adopted in Hadoop appliances, although additional computation overhead is required. Our accelerator compresses data from a PCIe (Peripheral Component Interconnect Express) interface, thus reducing the size of data that should be transmitted through a network. As a result, computation overhead of the main processor in a server is decreased and communication bandwidth is increased.

Live demonstration: CAN FD controller for in-vehicle network

In this paper, we propose a controller for the Controller Area Network with Flexible Data-Rate (CAN FD), an automotive communication protocol that supports flexible data length. The CAN FD is suitable for in-vehicle communication networks that requires a high reliability and high data transmission rate among ECUs. Experimental results show that our controller receives data from virtual ECU through SPI and transmits the data to the CANFD bus, completing the communication successfully.

Accelerating forex trading system through transaction log compression

In this paper, we propose the hardware architecture for high-speed transaction logging of forex trading system. In forex trading market, the trading volume of currencies is growing larger every year. In order to provide real-time processing of large volume and high availability service, we focused on the two types of the workload, where the bottleneck occurs, and conducted workload analysis. The bottleneck between the application server and the internal hard disk is caused by the overhead from storing the transaction logs, due to the bandwidth limitation of a hard disk. Our key idea is to suppress an overhead of the transaction logging through the compression of the transaction logs. Implementation result demonstrates the feasibility of our proposal for increasing the bandwidth through the log compression.

In-vehicle CAN FD Network for smart wearable devices

In this paper, we present an in-vehicle Controller Area Network with Flexible Data-Rate (CAN FD) bus controller for smart band-type wearable devices. The CAN FD is suitable for in-vehicle communication networks that require high reliability and high data transmission rates. The CAN FD controller supports variable data length transmissions for wearable devices. The CAN FD controller receives data from the Audio Video Navigation (AVN) through the Serial Peripheral Interface (SPI) and successfully transmits the data to the CAN FD bus.

Design of Hardware Accelerator for Lempel-Ziv 4 (LZ4) Compression

Hardware accelerators are being considered as important architectural components in the context of datacenter customization to achieve high performance and low power. Compression has played an important role in computer systems by enhancing storage and communication efficiency in the charge of extra computational cost. In this letter, we present a fully pipelined compression accelerator for the Lempel-Ziv (LZ) compression algorithm. The compression accelerator is verified by using FPGA and fabricated using 65nm CMOS technology.

A Hardware Scheduler for Multicore Block Cipher Processor

In consequence of an increasing demand for high-performance system, multiprocessor architectures became trend and used in a variety of fields (e.g. PC, laptops, mobile devices and so on). Multi-core processor can get outstanding throughput with relatively lower operating frequency and power consumption. In order to obtain the maximum throughput in a multi-core structure, it is necessary to schedule assigning tasks to multiple cores. In this paper, we propose a hardware scheduler that is tailored for multicore block cipher and verify the feasibility of the scheduler using AES algorithm.

CAN FD controller for in-vehicle system

In this paper, we propose a Controller Area Network with Flexible Data rate (CAN-FD) controller for communication network in automobile. The CAN FD is proper network protocol for in-vehicle and embedded communication which desires high reliability and data rate. We introduce our CAN FD controller which supports variable data length and faster data rate. The CAN FD controller receives data from virtual Electronic Control Unit (ECU) through Serial Peripheral Interface (SPI) and transmits the data to the system BUS. Our prototype has integrated along with processor for efficient control of the CAN FD communication.

Live demonstration: An FPGA based hardware compression accelerator for Hadoop system

Hadoop is an emerging data application for the big data processing. In Hadoop system, data compression is a significant part in processing big data effectively. Achieving this in software requires significant compute processing. In this paper we present the detailed design of a hardware compression accelerators. We also measure the performance of the hardware accelerators. Our analysis shows that hardware acceleration has the potential to improve the data compression by as much as 12x. As a result, our hardware accelerator provides a real time data processing of big data.

Design of an EMG signal recognition system for human-smartphone interface

In this paper, we propose an EMG signal recognition system for human-smartphone interface. Proposed system provides user experience and interface to control a smartphone application, recognizing pattern of surface electromyography (sEMG) in real time. For classifying events according to transition of the sEMG, classification checks whether an event is active or not in accordance with algorithm to compare the threshold value of the sEMG signal. Proposed system is portable and is able to be integrated into the SoC thanks to a part of proposed system in the field programmable gate array (FPGA). We expect proposed system can be exploited in the entertainment field and wearable device market.