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Dive into the research topics where Sang-Wan Nam is active.

Publication


Featured researches published by Sang-Wan Nam.


IEEE Journal of Solid-state Circuits | 2016

A 128 Gb 3b/cell V-NAND Flash Memory With 1 Gb/s I/O Rate

Woopyo Jeong; Jaewoo Im; Doohyun Kim; Sang-Wan Nam; Dongkyo Shim; Myung-Hoon Choi; Hyun-Jun Yoon; Dae-Han Kim; Y. Kim; Hyun Wook Park; Donghun Kwak; Sang-Won Park; Seok-Min Yoon; Wook-ghee Hahn; Jinho Ryu; Sang-Won Shim; Kyung-Tae Kang; Jeong-Don Ihm; In-Mo Kim; Doo-Sub Lee; Ji-Ho Cho; Moosung Kim; Jae-Hoon Jang; Sang-Won Hwang; Dae-Seok Byeon; Hyang-ja Yang; Kitae Park; Kye-Hyun Kyung; Jeong-Hyuk Choi

Most memory-chip manufacturers keep trying to supply cost-effective storage devices with high-performance characteristics such as shorter tPROG, lower power consumption and higher endurance. For many years, every effort has been made to shrink die size to lower cost and to improve performance. However, the previously used node-shrinking methodology is facing challenges due to increased cell-to-cell interference and patterning difficulties caused by decreasing dimension. To overcome these limitations, 3D-stacking technology has been developed. As a result of long and focused research in 3D stacking technology, we succeed in developing 128 Gb 3b/cell Vertical NAND with 32 stack WL layers for the first time, which is the smallest 128 Gb NAND Flash. The die size is 68.9 mm 2, program time is 700 us and I/O rate is 1 Gb/s.


international solid-state circuits conference | 2015

7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate

Jaewoo Im; Woopyo Jeong; Doohyun Kim; Sang-Wan Nam; Dongkyo Shim; Myung-Hoon Choi; Hyun-Jun Yoon; Dae-Han Kim; Y. Kim; Hyun Wook Park; Donghun Kwak; Sang-Won Park; Seok-Min Yoon; Wook-ghee Hahn; Jinho Ryu; Sang-Won Shim; Kyung-Tae Kang; Sung-Ho Choi; Jeong-Don Ihm; Young-Sun Min; In-Mo Kim; Doo-Sub Lee; Ji-Ho Cho; Oh-Suk Kwon; Ji-Sang Lee; Moosung Kim; Sang-Hyun Joo; Jae-Hoon Jang; Sang-Won Hwang; Dae-Seok Byeon

Most memory-chip manufacturers keep trying to supply cost-effective storage devices with high-performance characteristics such as smaller tPROG, lower power consumption and longer endurance. For many years, every effort has been made to shrink die size to lower cost and to improve performance. However, the previously used node-shrinking methodology is facing challenges due to increased cell-to-cell interference and patterning difficulties caused by decreasing dimension. To overcome these limitations, 3D-stacking technology has been developed. As a result of long and focused research in 3D stacking technology, 128Gb 2b/cell device with 24 stack WL layers was announced in 2014 [1].


international solid-state circuits conference | 2014

19.5 Three-dimensional 128Gb MLC vertical NAND Flash-memory with 24-WL stacked layers and 50MB/s high-speed programming

Kitae Park; Jinman Han; Dae-Han Kim; Sang-Wan Nam; Kihwan Choi; Min-Su Kim; Pan-Suk Kwak; Doo-Sub Lee; Yoon-He Choi; Kyung-Min Kang; Myung-Hoon Choi; Donghun Kwak; Hyun-Wook Park; Sang-Won Shim; Hyun-Jun Yoon; Doohyun Kim; Sang-Won Park; Kangbin Lee; Kuihan Ko; Dongkyo Shim; Yang-Lo Ahn; Jeunghwan Park; Jinho Ryu; Dong-Hyun Kim; Kyungwa Yun; Joonsoo Kwon; Seunghoon Shin; Dong-Kyu Youn; Won-Tae Kim; Tae-hyun Kim


Archive | 2014

Memory system and driving method thereof

Sang-Wan Nam; Kuihan Ko; Yang-Lo Ahn; Kitae Park


Archive | 2016

METHOD OF OPERATING MEMORY CONTROLLER AND DATA STORAGE DEVICE INCLUDING MEMORY CONTROLLER

Sang-Wan Nam; Kitae Park


Archive | 2017

3D FLASH MEMORY DEVICE HAVING DIFFERENT DUMMY WORD LINES AND DATA STORAGE DEVICES INCLUDING SAME

Sang-Wan Nam; Kitae Park


Archive | 2014

NONVOLATILE MEMORY DEVICE, A MEMORY SYSTEM HAVING THE SAME, AND A READ METHOD THEREOF

Sang-Wan Nam; Kitae Park; Hyun-Wook Park; Jae-Kyun Rhee


Archive | 2015

Memory system and programming method thereof

Sang-Won Shim; Sang-Wan Nam; Kitae Park


Archive | 2014

Nonvolatile memory device, a memory system having the same, and a read method thereof, the read method applying a read pass voltage to a selected wordline after a sensing

Sang-Wan Nam; Kitae Park; Hyun-Wook Park; Jae-Kyun Rhee


Archive | 2013

Nonvolatile memory device and control method thereof

Yang-Lo Ahn; Sang-Wan Nam; Sang-Won Shim

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