Sara Stolyarova

Structure of CdZnTe films on glass

Polycrystalline Cd1−xZnxTe films were grown on glass substrates over the full range of compositions (0 < x < 1) by metal–organic chemical vapour deposition at 480 °C. The films (~5 µm thick) showed uniform texture oriented along the 1 1 1 direction, perpendicular to the substrate, independent of the film composition. The dependence of the lattice parameter of cubic Cd1−xZnxTe on the composition followed Vegards law. The thick Cd1−xZnxTe films were shown to be of a single phase and structurally stable. The average grain size in the thick films was in the range 3–5 µm. The dominant imperfections in the films were twins (mostly Σ = 3) and dislocations. The x-ray diffraction (XRD) FWHM parameter reached a maximum at x = 0.5. Transmission electron microscopy (TEM) in situ heating in the range 200–400 °C caused plastic deformation in the grains without causing ordering effects. Optical absorption and low-temperature photoluminescence measurements confirmed the XRD and TEM results.

CMOS-SOI-MEMS Transistor for Uncooled IR Imaging

This paper reports the design, fabrication technology, post-CMOS micromachining and characterization of CMOS-silicon-on-insulator (SOI)-microelectromechanical system (MEMS) transistors. The thermally isolated micromachined CMOS-SOI-MEMS transistor reported here is designed for uncooled infrared (IR) sensing and is dubbed here as ldquoTMOS.rdquo The measured dc and noise electrical characteristics of the as-processed (virgin) transistor as well as those of the post-CMOS-MEMS-processed transistor (TMOS) are reported and compared. In particular, the threshold voltage temperature dependence and the temperature coefficient of current (TCC) at subthreshold are reported. The results indicate that the post-CMOS-MEMS processing does not degrade the performance of the transistors. The electrooptical performance of the TMOS is characterized and reported. With TCC on the order of 4%-10%, depending on the gate voltage, responsivity of 40 mA/W, noise equivalent power on the order of several tens of picowatts, and calculated noise equivalent temperature difference on the order of 64 mK, this uncooled IR sensor in standard CMOS-SOI technology may provide a high performance at a lower cost compared to state-of-the-art uncooled sensors based on bolometers implemented in non-CMOS materials like vanadium oxide or amorphous silicon.

MEMS Composite Porous Silicon/Polysilicon Cantilever Sensor for Enhanced Triglycerides Biosensing

A novel composite porous silicon/polysilicon microcantilever for biosensing applications with enhanced sensitivity is reported. It is fabricated by surface micromachining of polysilicon cantilevers followed by the formation of the surface porous layer after release by Reaction Induced Vapor Phase Stain Etch. The microcantilevers with porous surface layer are characterized by their morphology that exhibits a dual macro and nanostructure for very effective immobilization of biomolecules. The current work focuses on the fabrication of composite porous silicon/polysilicon microcantilevers, characterization of their morphology and demonstration of improved immobilization of enzymes resulting in enhanced sensing of triglycerides.

THz Measurements and Calibration Based on a Blackbody Source

This paper presents a low-cost measurement setup for THz applications, based on a blackbody source, which is a commercial off-the-shelf (COTS) component. This measurement approach resembles the natural operating conditions of passive imaging systems and hence is more adequate in the characterization of the operation of THz sensors and filters for passive systems than narrowband THz sources. The calibration methodology of mesh filters that may block the unwanted IR radiation as well as that of THz thermal sensors is discussed. The components for uncooled passive thermal imaging: the innovative CMOS-SOI-NEMS thermal sensor (the TeraMOS) as well as mesh filters are characterized in the measurement setup presented here. The TeraMOS sensor reported here is a small array of 4 ×4 pixels, each 100 ×100 (μm)2, with CMOS transistors with W/L=2/40, which are electrically connected but are thermally isolated. The NEP is of the order of NEP/√Hz|1 Hz=10 pW/√Hz, when viewing blackbodies at T=1300 K. The values of D* and NETD, obtained from this NEP, are 0.2·1010 cm√Hz/W and ~ 0.2 K. The corresponding NETD of a single pixel is ~ 0.8 K, indicating that this uncooled THz sensor in standard CMOS-SOI technology may enable monolithic uncooled passive THz imagers.

The TeraMOS sensor for monolithic passive THz imagers

We report of a new sensor, which is based on several leading technologies: THz photonics, CMOS-SOI (Silicon-on-Insulator) and MEMS/NEMS (Micro/Nano Electro Mechanical Systems). By introducing the TeraMOS sensor, which may be directly integrated with the CMOS-SOI readout circuitry, we expect to achieve a breakthrough in Terahertz passive imaging (0.5–1.5 THz) both in performance and cost. NEP (Noise Equivalent Power) of the order of 1 pW/Hz1/2 and NETD (Noise Equivalent Temperature Difference) of ∼0.5K is expected at room temperature. Preliminary electro-optical measurements are presented.

Enhancement of porous silicon photoluminescence by NF3/UV photo-thermal surface treatment

A NF3/UV photo-chemical surface treatment of porous silicon is presented. The UV photons are provided by an excimer lamp. This treatment strongly enhances the photoluminescence of porous silicon. The increase of PL intensity is about 1-2 orders of magnitude at treatment temperatures in the range of 300-400°C. Using AFM and Auger measurements, it is found that the PL enhancement can be correlated with the growth of about micron thick SiOx layer with the x value close to 2, and incorporation of fluorine. The overall effect of photoluminescence enhancement is suggested to be due to the NF3/UV photothermal etching of the as-formed native oxide, as well as to the cleaning and passivation of the porous silicon surface with fluorine, followed by a rapid growth of a more stoichiometric oxide SiOx(x≈2) layer in air.

Long-range order in CdZnTe epilayers

We report the evidence of long-range order (LRO) in CdZnTe epilayers grown by metal organic chemical vapour deposition (MOCVD) on (100) CdTe. LRO has been characterized by both transmission electron microscopy (TEM) and polarized photoluminescence (PL) measurements. The observation of extra-spots in the diffraction pattern of Cd0.52 Zn0.48 Te samples indicate the CuPt type structure, as corroborated by computer simulation. Valence band splitting (VBS) up to 25 meV, measured by polarized PL gives additional proof of atomic ordering. The order parameter = 0.6 was calculated from VBS using a parabolic approximation.

Valence band splitting in Cd(1−x)ZnxTe epilayers

Abstract We present the first experimental evidence for the breaking of the cubic symmetry in the band structure of CdZnTe epilayers deposited by metal-organic chemical vapor deposition (MOCVD). Polarized PL measurements along [110] and [ 1 10] directions were performed and the valence band splitting (VBS) was determined. Growth conditions (growth temperature and partial pressure ratio) and type and misorientation of the substrates are correlated to the VBS of Cd1−xZnxTe epilayers.

Molecular recognition induced mechanics: isotope effects in the interaction between gas phase substances and polymer-coated microcantilevers

A novel Porous-Silicon-Over-Silicon (PSOS) chemomechanical microcantilever sensor for the isotope discrimination of gas phase substances is presented. A strong isotope effect is observed in the guest induced PSOS microcantilever bending curves of novel poly-4-vinylpyridine (P4VP) coated microcantilevers. Isotopologues of ethanol and water exhibit a clear difference in their time dependent bending response patterns. While the sorption of protiated isotopologues exhibits Langmuir-type sorption curves, deuterated isotopologues exhibit anomalous bending overshoot curves.

High performance MEMS 0.18μm RF- CMOS inductors

This work presents the fabrication and characterization of on-chip micromachined spiral inductors in a commercially available 0.18mum CMOS process provided by TOWER Semiconductors Ltd. It explores the possibility to reduce parasitic effects and extending high frequency performance by applying a maskless micromachining post processing to create fully integrated inductors, suspended over the substrate with inter-turn dielectric removed.