Igor Brouk

Measurements and Simulations of Low Dark Count Rate Single Photon Avalanche Diode Device in a Low Voltage 180-nm CMOS Image Sensor Technology

This paper presents the key features of single photon avalanche diode (SPAD) devices fabricated in a low voltage commercial 180-nm CMOS image sensor technology exhibiting very low dark count rate (DCR). The measured DCR is <; 100 Hz at room temperature even for excess voltages above 2 V. The active junction of the SPAD measures 10 μm in diameter within a 24-μm test structure. The active region where Geiger avalanche occurs is determined by an implanted charge sheet. Edge avalanche is averted by utilizing a virtual guard ring, formed by the retrograde well profile. The design, measurements, and simulations of doping and electric field profiles that lead to such low DCR are reported and analyzed. The current-voltage characteristics and the temperature dependence of the breakdown voltage provide further, indirect evidence for the low DCR measured in the device. Thus, the key features of measured good SPADs are presented and are correlated with simulations that give physical insight on how to design high-performance SPADs.

1/f noise in advanced CMOS transistors

This paper is a review of 1/f noise in state-of-the-art advanced MOSFETs, where the channel length has deep submicron or nano-scale dimensions. The origin of 1/f noise, models of 1/f noise, and ways of measuring 1/f noise are briefly reviewed.

Characterization of crosstalk between CMOS photodiodes

Abstract The crosstalk in CMOS photodiodes has been measured, at two wavelengths of 543 and 633 nm, by an experimental structure containing several types of photodiodes with varying dimensions. The role of the design of the junction in reducing crosstalk is studied. The measurements indicate that to reduce crosstalk it is essential to optically shield the gap between junctions and to reverse bias the adjacent junctions. Crosstalk is significantly reduced in double-junction photodiodes, but at the cost of lower quantum efficiency. The results indicate that with properly designed layout, the crosstalk may be small. However, there is a tradeoff between small crosstalk, reduced fill factor and quantum efficiency.

Dimensional effects in CMOS photodiodes

Abstract CMOS photodiodes with various structures and dimensions were measured and analyzed. The photodiode types under study include structures implemented by: n+ (source implantation)/P-substrate, N-well/P-substrate, and p+ (source implantation)/N-well/P-substrate. Long photodiodes with a narrow width varying between 2–50 μm were studied, in order to consider dimensional effects. For the design under study, a 2-D model is adequate while the overall photodiode size provides sufficient signal for measurement accuracy. The quantum efficiency, dark current and spectral noise behavior were measured and compared with simulations. The good fit between measurements and simulations indicates that the physical mechanisms and the technology parameters, which determine the performance of the CMOS photodiodes, are understood.

THz Measurements and Calibration Based on a Blackbody Source

This paper presents a low-cost measurement setup for THz applications, based on a blackbody source, which is a commercial off-the-shelf (COTS) component. This measurement approach resembles the natural operating conditions of passive imaging systems and hence is more adequate in the characterization of the operation of THz sensors and filters for passive systems than narrowband THz sources. The calibration methodology of mesh filters that may block the unwanted IR radiation as well as that of THz thermal sensors is discussed. The components for uncooled passive thermal imaging: the innovative CMOS-SOI-NEMS thermal sensor (the TeraMOS) as well as mesh filters are characterized in the measurement setup presented here. The TeraMOS sensor reported here is a small array of 4 ×4 pixels, each 100 ×100 (μm)2, with CMOS transistors with W/L=2/40, which are electrically connected but are thermally isolated. The NEP is of the order of NEP/√Hz|1 Hz=10 pW/√Hz, when viewing blackbodies at T=1300 K. The values of D* and NETD, obtained from this NEP, are 0.2·1010 cm√Hz/W and ~ 0.2 K. The corresponding NETD of a single pixel is ~ 0.8 K, indicating that this uncooled THz sensor in standard CMOS-SOI technology may enable monolithic uncooled passive THz imagers.

The TeraMOS sensor for monolithic passive THz imagers

We report of a new sensor, which is based on several leading technologies: THz photonics, CMOS-SOI (Silicon-on-Insulator) and MEMS/NEMS (Micro/Nano Electro Mechanical Systems). By introducing the TeraMOS sensor, which may be directly integrated with the CMOS-SOI readout circuitry, we expect to achieve a breakthrough in Terahertz passive imaging (0.5–1.5 THz) both in performance and cost. NEP (Noise Equivalent Power) of the order of 1 pW/Hz1/2 and NETD (Noise Equivalent Temperature Difference) of ∼0.5K is expected at room temperature. Preliminary electro-optical measurements are presented.

An Estimation of Single Photon Avalanche Diode (SPAD) Photon Detection Efficiency (PDE) Nonuniformity

An analytical expression estimating the photon detection efficiency (PDE) nonuniformity of single-photon avalanche diodes is derived. The estimation relies upon well-established semiempirical and analytical models and is useful for medium- to high-resolution arrays, as well as for wafer-to-wafer variations. While the only explicit example presented so far is for 1-D estimation based on breakdown voltage variation, the proposed PDE nonuniformity estimation algorithm can be expanded to additional dimensions so as to incorporate spread in technological parameters such as junction depth, well depth, and local defects.

Voltage and current integrated readout for uncooled passive IR sensors based on CMOS-SOI-NEMS technology

Novel uncooled thermal sensor based on a suspended transistor (TMOS) made in standard CMOS-SOI process and released by post-etching, has been developed at Technion. Monolithic ROIC design principles for TMOS IR imagers, based on current and voltage operation modes are presented. Performance analysis of imaging sensors operated either in voltage or current sensing mode, is presented. The major challenges associated with the technology: Very low ratio of signal current or voltage relative to the DC power supply voltage or current, self-heating thermal effects, mismatch and low-frequency noise are discussed.

Analysis of noise in CMOS image sensor

CMOS image sensors based on active pixel sensors (APS) are now the preferred technology for most imaging applications. With advanced technology, reduced channel size, novel designs extending the more established pixels based on three transistors (3T design) into four transistors (4T design employing pinned photodiodes), the performance keeps improving [1-2]. Noise sets a limit on image sensor performance, mainly under conditions of low illumination. Analysis of noise in CMOS APS has been reported by several authors. In this paper, we present an analysis of noise due to thermal, 1/f and shot noise sources in two types of APS, known as the 3T and 4T pixel design, based on a unified time-dependent approach, using the separation of the system into two parts: time-invariant part (the APS without switching) and a time-variant part (taking into consideration the switching process).system. To calculate explicit noise expressions for noise performance we, therefore, resort to time dependent circuit models and perform time-domain noise analysis, taking into account the stationary nature of the various noise processes. The main advantage of the present method is that it is mathematically correct and avoids a basic flaw underlining the widely-used conventional methods (that freely use time- invariant methods for time-dependent systems).

Selecting Single Photon Avalanche Diode (SPAD) Passive-Quenching Resistance: An Approach

An approach useful for designing the passive quenching circuitry of single-photon avalanche diodes (SPADs) is presented. A method is introduced which enables a chip designer to correctly select the appropriate resistance of the passive quenching component of the chip. The range of external resistance required for adequate quenching can be determined solely from the measured dc I–V characteristics of the SPAD. The tradeoff between various allowable values of resistance is discussed.