Scott A. Olson

A 100 MHz 2.5 GHz Direct Conversion CMOS Transceiver for SDR Applications

This paper describes a fundamentally flexible low power transceiver implemented in 90 nm CMOS. Novel circuit architectures have been implemented to overcome problems that have encumbered wideband transceivers in the past. Flexible programming allows the RFIC to process signals of multiple wireless protocols from 100 MHz - 2.5 GHz with channel bandwidths from 8 KHz to 20 MHz. At 1.8 GHz the receiver noise figure is 7 dB with IP3 of -6 dBm and voltage gain of 48 dB. The transmitter has better than 40 dB carrier suppression, 35 dB sideband suppression, and EVM of 1% at 800 MHz. The frequency synthesizer uses direct digital synthesis to achieve instantaneous frequency switching and phase noise of -123 dBc/Hz at 25 KHz offset.

A Self-Calibrating Sub-Picosecond Resolution Digital-to-Time Converter

A novel self-calibrating high-resolution digital-to-time converter (DTC) achieves 1024 individual phase states with a resolution of 0.5 ps. The phase interpolation is done in steps, by using a cascade of coarse active delay locked line and a passive programmable fine delay. The DTC is capable of self-calibration by using an integrated dual mixer time domain (DMTD) circuit to overcome device mismatch and process variations. The DTC is constructed using 90 nm standard digital CMOS technology at 1 GHz RF frequency. Future improvements are expected to increase the resolution to 0.1 ps and below.

Distributed Amplifier with Narrowband Amplifier Efficiency

A fully integrated tapered output line distributed cascode SiGe HBT amplifier is presented which presents an identical load to each transistor. A nodal analysis of currents in the output transmission line gives insight into the often assumed efficiency/bandwidth trade-off of a distributed amplifier. The four section one half watt amplifier with 50 Omega input and output exhibits a gain of 21 dB from 100 to 800 MHz with a saturated collector efficiency of 79% at 100 MHz.

Distributed Power Amplifier with electronic harmonic filtering

Providing all band power amplification and harmonic rejection are objectives with orthogonal implementations. This paper is a review of a new Distributed Power Amplifier (DPA) architecture using programmable frequency dispersion. This frequency domain dispersion is designed to achieve electronic harmonic filtering within the intended frequency band. Tunable reactive components are not practical in a high power transmitter network. Instead vector signal combining is used to provide very narrow band destructive harmonic cancellation while the vector signal processing for the fundamental is constructive. This is a novel technology that enables an all band Software Defined Transmitter suitable for portable battery power communications equipment.