Seigo Yamawaki
Fujitsu
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Seigo Yamawaki.
electronic components and technology conference | 2017
Tomoyuki Akahoshi; Daisuke Mizutani; Kei Fukui; Seigo Yamawaki; Hidehiko Fujisaki; Manabu Watanabe; Masateru Koide
This paper proposes a method of improving power delivery in a CPU package substrate with multilayer thin film capacitors (TFCs). Because TFC embedded technology can reduce the inductance of power delivery path, it can stabilize the power supply to the CPU. Higher permittivity, thinner layer thickness and wider conductor plane area results in larger capacitance. To further stabilize the power supply, we developed a package structure with an embedded double TFC layer that can double the capacitance. The double TFC embedded package was formed by laminating two TFCs to the top and bottom of the core layers in a build–up substrate. Through verification using test vehicles, it was confirmed that electrical performance was significantly improved with the double TFC. Also, it was demonstrated that the criteria of the capacitance and insulation resistance were satisfied in the product reliability tests.
electronic components and technology conference | 2017
Kenji Fukuzono; Manabu Watanabe; Daisuke Mizutani; Tomoyuki Akahoshi; Hidehiko Fujisaki; Seigo Yamawaki; Kei Fukui
This paper reports on a large-size CPU package for UNIX servers which employs embedded thin film capacitor layers. The substrate of this package has two thin film capacitor layers in the surface of the core layer, which has a capacitance of 25 uF in total. In order to adopt this package substrate, we confirmed the effect of the thin film capacitor layers on the package assembly process. We actually measured mechanical characteristics and the coefficient of thermal expansion (CTE), and confirmed that we can use it like conventional package substrates. This package has passed the preprocessing and subsequent environmental test on JEDEC Level 4, and we think that a high-quality package has been developed this time. Fujitsu adopted a low melting point solder BGA from a previous-generation package. Its composition is Sn-57Bi-1.0Ag. However, this solder has an issue with deformation after a low-temperature reflow profile for the solder ball attachment process on the package. In this work, we were able to find the cause of this phenomenon, and by changing the Ag content from 1.0% to 0.4%, we achieved a complete low-temperature assembly process. In addition, BGA connection reliability was confirmed.
Archive | 2008
Kenji Iida; Tomoyuki Abe; Yasutomo Maehara; Shin Hirano; Takashi Nakagawa; Hideaki Yoshimura; Seigo Yamawaki; Norikazu Ozaki
Archive | 2009
Takashi Nakagawa; Kenji Iida; Yasutomo Maehara; Shin Hirano; Tomoyuki Abe; Hideaki Yoshimura; Seigo Yamawaki; Norikazu Ozaki
Archive | 2008
Kenji Iida; Tomoyuki Abe; Yasutomo Maehara; Shin Hirano; Takashi Nakagawa; Hideaki Yoshimura; Seigo Yamawaki; Norikazu Ozaki
Archive | 2008
Kenji Iida; Tomoyuki Abe; Yasutomo Maehara; Shin Hirano; Takashi Nakagawa; Hideaki Yoshimura; Seigo Yamawaki; Norikazu Ozaki
Archive | 2007
Tomoyuki Abe; Shin Hirano; Kenji Iida; Yasutomo Maehara; Takashi Nakagawa; Tokuichi Ozaki; Seigo Yamawaki; Hideaki Yoshimura; 隆志 中川; 靖友 前原; 英明 吉村; 徳一 尾崎; 清吾 山脇; 伸 平野; 知行 阿部; 憲司 飯田
cpmt symposium japan | 2017
Masateru Koide; Kenji Fukuzono; Manabu Watanabe; Hidehiko Fujisaki; Seigo Yamawaki; Kei Fukui; Daisuke Mizutani; Tomoyuki Akahoshi; Kazuhiro Nonomura; Hiroyuki Adachi; Jun Yamada
Archive | 2017
Kenji Iida; Takashi Nakagawa; Seigo Yamawaki; Yasuhiro Karahashi; Junichi Kanai; Koji Komemura
Archive | 2015
Kenji Iida; Takashi Nakagawa; Seigo Yamawaki; Yasuhiro Karahashi; Junichi Kanai; Koji Komemura