Sensuke Okada

Cavity down AlN PGA with inter-polyimide wiring

A low-thermal-resistance, high-speed pin-grid-array (PGA) package is discussed. To obtain low thermal resistance, a silicon chip was soldered onto a metallized aluminum nitride ceramic substrate that directly contacts an air-cooled fin (a cavity-down structure). Low propagation delay was realized by placing signal lines between low-dielectric-constant polyimide layers that were coated on the substrate. The thermal resistance from the silicon chip to the air environment was 2.7 degrees C/W with a 20-mm-high fin when the air velocity was 2 m/s. The self-inductance of the longest signal line was 20 nH, and the capacitance between the longest signal lines was 1.7 pF. The helium leakage level was about 10/sup -9/ atm-cm/sup 3//s even after 24 cycles in a thermal cycle test from -55 degrees C to 150 degrees C.<<ETX>>