Shashank Dabral

Lessons and Experiences with High-Level Synthesis

Electronic system level (ESL) design has attracted considerable attention in the past few years, and high level synthesis is a significant component of ESL design. Despite advances in HLS algorithms, the RTL remains the dominant specification and synthesis level. This article is a designers perspective on the benefits and challenges of using commercially available HLS tools. They discuss their impact on four criteria: design goals, verification closure, eco handling, and productivity gains.

Trends in camera based Automotive Driver Assistance Systems (ADAS)

Advance Driver Assistance Systems (ADAS), once limited to high end luxury automobiles are fast becoming popular with Mid and entry level segments driven in part by legislation coming in to effect in the latter part of this decade. These systems require support for a wide variety of applications, from surround-view visual systems to safety critical vision applications (eg Pedestrian Detect, automatic braking etc). In this white paper we describe some of the existing and emerging trends and applications in each of these segments along with the requirements and motivations for each of these features. We also highlight TIs automotive class TDA2x device, a state of the art automotive grade device capable of handling complex ADAS applications within a low power and cost budget.

High performance and flexible imaging Sub-system

Imaging Sub-system (ISS) enables capturing photographs or live video from raw image sensors. This consists of a set of sensor interfaces and cascaded set of algorithms to improve image/video quality. This paper illustrates typical imaging sub-system architectures consisting of a Sensor front end, an Image Signal Processor (ISP) and an Image Co-processor (sIMCOP). Here we describe the ISS developed by Texas Instruments (TI) for the OMAP 5432 processor. The given solution is flexible to interface with various kinds of image sensors and provides hooks to tune visual quality for specific customers as well as end applications. This solution is also flexible by providing options to enable customized data flows based on actual algorithm needs. The overall solution runs at a high throughput of 1 pixel/clock cycle to enable full HD video at high visual quality.

A Diverse Low Cost High Performance Platform for Advanced Driver Assistance System (ADAS) Applications

Advanced driver assistance systems (ADAS) are becoming more and more popular. Lot of the ADAS applications such as Lane departure warning (LDW), Forward Collision Warning (FCW), Automatic Cruise Control (ACC), Auto Emergency Braking (AEB), Surround View (SV) that were present only in high-end cars in the past have trickled down to the low and mid end vehicles. Lot of these applications are also mandated by safety authorities such as EUNCAP and NHTSA. In order to make these applications affordable in the low and mid end vehicles, it is important to have a cost effective, yet high performance and low power solution. Texas Instruments (TIs) TDA3x is an ideal platform which addresses these needs. This paper illustrates mapping of different algorithms such as SV, LDW, Object detection (OD), Structure From Motion (SFM) and Camera-Monitor Systems (CMS) to the TDA3x device, thereby demonstrating its compute capabilities. We also share the performance for these embedded vision applications, showing that TDA3x is an excellent high performance device for ADAS applications.

Implementation details of mid-level vision on the Embedded Vision Engine (EVE)

In this paper we introduce the Embedded Vision Engine (EVE), a novel vision accelerator designed to complement digital signal processors on low- and mid-level vision algorithms. We illustrate EVEs performance on three important mid-level vision functions, the Hough transform for circles, integral image and calculating the Rotation invariant Binary Robust Independent Elementary Feature (RBRIEF) descriptor. EVE can execute these functions 4 times faster than the state-of-the-art digital signal processor. With other vision functions accelerated 3-12X, the acceleration of these popular vision functions contribute to the application level speed up of 5x on common automotive vision applications. This demonstrates that EVE, while working at powers comparable to the power of a DSP core, can deliver significant boost in performance.

A 216 GOPS flexible WDR Image Processor for ADAS SoC

Advanced Driver Assistance Systems (ADAS) enhance the ability of a vehicle driver to avoid possible road accidents resulting in a safer driving experience. Front camera ADAS is probably the most challenging of all. These systems require high computational processing, in the range of hundreds of GOPS, within a 4 Watt power budget driven by thermal constraints of small enclosed assembly of the final system. In this paper, we present, Wide Dynamic Image (WDR or HDR) Processor as part of the Imaging Sub-system (ISS) that is flexible to interface with various kinds of optical sensor across different manufactures. The design achieves an overall throughput of 216 GOPS with performance efficiency of 66.4 GOPS/mm2 and power efficiently of 1.8 TOPS/W.

Image signal processing for front camera based automated driver assistance system

Advanced driver assistance systems (ADAS) are designed to increase drivers situational awareness and road safety by providing essential information, warning and automatic intervention to reduce the possibility/severity of an accident. Front Camera (FC) based ADAS system uses computer vision based techniques to detect obstacles (e.g. pedestrian, cyclist etc) on road from captured image. Typical Image Signal Processing (ISP) is developed to cater cellphones and Digital Still Cameras (DSC) for purpose of human viewing unlike computer vision algorithms whose purpose is to help driver. The given paper explains typical sensor as well as ISP requirements for FC systems deployed in ADAS along with difference compared to cellphones and DSC. The paper proposes typical ISP pipeline which is tuned for computer vision (CV) application. The proposed solution is different in terms of input and output format & bit-depth, processing needs, actual processing algorithm, safety, temperature and thermal constraints. The proposed ISP pipeline is simulated on PC and can be enabled by means of mix of hardware and software on TIs Driver Assistance (TDA) series of processors.