Shawn M. O'Rourke

Low-temperature amorphous-silicon backplane technology development for flexible displays in a manufacturing pilot-line environment

— A low-temperature amorphous-silicon (a-Si:H) thin-film-transistor (TFT) backplane technology for high-information-content flexible displays has been developed. Backplanes were integrated with frontplane technologies to produce high-performance active-matrix reflective electrophoretic ink, reflective cholesteric liquid crystal and emissive OLED flexible-display technology demonstrators (TDs). Backplanes up to 4 in. on the diagonal have been fabricated on a 6-in. wafer-scale pilot line. The critical steps in the evolution of backplane technology, from qualification of baseline low-temperature (180°C) a-Si:H process on the 6-in. line with rigid substrates, to transferring the process to flexible plastic and flexible stainless-steel substrates, to form factor scale-up of the TFT arrays, and finally manufacturing scale-up to a Gen 2 (370 × 470 mm) display-scale pilot line, will be reviewed.

Circuit-Level Impact of a-Si:H Thin-Film-Transistor Degradation Effects

This paper reviews amorphous silicon thin-film-transistor (TFT) degradation with electrical stress, examining the implications for various types of circuitry. Experimental measurements on active-matrix backplanes, integrated a-Si:H column drivers, and a-Si:H digital circuitry are performed. Circuit modeling that enables the prediction of complex-circuit degradation is described. The similarity of degradation in amorphous silicon to negative bias temperature instability in crystalline PMOS FETs is discussed as well as approaches in reducing the TFT degradation effects. Experimental electrical-stress-induced degradation results in controlled humidity environments are also presented.

30.2: Active Matrix Electrophoretic Displays on Temporary Bonded Stainless Steel Substrates with 180 °C a‐Si:H TFTs

A low temperature, 180 °C, amorphous Si (a-Si:H) process on bonded stainless steel substrates is discussed and a 3.8-inch QVGA active matrix (AM) electrophoretic display as well as a 64×64 electrophoretic display with integrated column drivers are demonstrated. The n-channel thin-film transistors (TFTs) exhibited saturation mobilities of 0.7 cm2/V-sec, median drive currents of 26.2 μA and low defectivity.

Amorphous Silicon Thin-Film Transistor Backplanes Deposited at 200

The transition of thin-film transistor (TFT) backplanes from rigid plate glass to flexible substrates requires the development of a generic TFT backplane technology on a clear plastic substrate. To be sufficiently stable under bias stress, amorphous-silicon (a-Si:H) TFTs must be deposited at elevated temperatures, therefore the substrate must withstand high temperatures. We fabricated a-Si:H TFT backplanes on a clear plastic substrate at 200degC. The measured stability of the TFTs under gate bias stress was superior to TFTs fabricated at 150degC. The substrate was dimensionally stable within the measurement resolution of 1, allowing for well-aligned 8 times 8 and 32 times 32 arrays of pixels. The operation of the backplane is demonstrated with an electrophoretic display. This result is a step toward the drop-in replacement of glass substrates by plastic foil.

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A low temperature, 180 °C, amorphous Si (a-Si:H) process on bonded polyethylene naphthalate substrates is discussed and a 4.1-inch QVGA active matrix (AM) phosphorescent OLED display is demonstrated. The n-channel thin-film transistors (TFTs) exhibited saturation mobilities of 0.773 cm2/V-sec, layer to layer registration distortion less than 10ppm and low defectivity. The efficiency of the OLED display is 39 cd/A at 500 nits.

on Clear Plastic for Lamination to Electrophoretic Displays

The U.S. Army, Arizona State University (ASU) and commercial industry have joined forces to create the Flexible Display Center (FDC) at Arizona State University, a large-scale collaborative venture designed to rapidly advance flexible display technology to the brink of commercialization. The Center has completed its startup phase and is now engaged in an intensive and aggressive applied research and development program that will produce high quality, high performance active matrix reflective and emissive flexible display technology demonstrators (TDs). Electrophoretic ink and cholesteric liquid crystals have been selected as Center reflective imaging layer technologies; these technologies are attractive because they are fully reflective and bistable (extremely low power) and because the materials are environmentally robust and intrinsically rugged. Organic light emitting devices (OLEDs) have been chosen as the emissive imaging layer technology. These three electro-optic subsystems will be integrated with a flexible a-Si thin film transistor active matrix backplane platform. We have created the integrated design, backplane fabrication, display assembly, test and evaluation capability to enable rapid cycles of learning and technology development. Backplane fabrication is currently accomplished on a 6” wafer scale pilot line linked to a Manufacturing Execution System and supported by a comprehensive suite of in-fab metrology tools. We are currently installing a GEN II pilot line, with qualified operation slated for 2006. This line will be used to demonstrate process and display form factor capability, while providing high yield low volume manufacturing of pilot-scale levels of technology demonstrators for the Army and our commercial partners.

65.4: Active Matrix PHOLED Displays on Temporary Bonded Polyethylene Naphthalate Substrates with 180 °C a-Si:H TFTs

In this paper we describe solutions to effectively address critical challenges in direct fabrication of amorphous silicon thin film transistor (TFTs) arrays for active matrix flexible displays. For both metal foil and plastic flexible substrates a manufacturable handling protocol in automated display-scale equipment is required. We have successfully demonstrated a temporary bonding protocol that required development of new enabling materials, tools and processes. For metal foil substrates, the principal challenges are planarization and electrical isolation, and management of stress (CTE mismatch) during TFT fabrication. For plastic substrates, the principal challenges are dimensional instability management in conjunction with manufacturing-ready temporary adhesives. Solutions required a systems-level approach to address the challenges of the substrates and their handling simultaneously.

Flexible reflective and emissive display integration and manufacturing

Organosiloxane based spin on planarizing dielectrics (PTS-E and PTS-R) were developed for application in flat panel displays as a replacement to conformal chemical vapor deposited SiNx. Here we demonstrate the successful use of siloxane-based material as a passivation layer for active matrix α-Si thin film transistors (TFT) on both rigid and flexible substrates.

Direct Fabrication of a-Si:H Thin Film Transistor Arrays on Flexible Plastic Film and Metal Foil Substrates: Critical Challenges and Enabling Solutions

Active matrix displays have been demonstrated on flexible stainless and plastic substrates and typically use external complementary metal oxide semiconductor (CMOS) drivers. We have previously demonstrated integrated amorphous silicon (a-Si:H) source drivers on an electrophoretic display on flexible stainless steel substrate. In this paper, we present an improved version of our a-Si:H source driver design on a flexible plastic substrate (polyethylene naphthalate or PEN). The new design uses fewer TFTs, provides an extended dynamic range, is faster and uses lower power. A single column of the source driver is fabricated on PEN and successfully tested at 10, 20 and 30 Hz frame rates. By using this architecture, the number of source interconnects for a 320times240 display can be reduced by 3x. These integrated a-Si:H column drivers are demonstrated driving an 16times8 pixel electrophoretic display.

12.2: Solution Processable Passivation Layer for Active Matrix Thin Film Transistors on Rigid and Flexible Substrates

Purpose – The purpose of this paper is to present the development of printed wiring board (PWB)‐based microfluidic building blocks and their integration into systems for DNA amplification and electronic detection.Design/methodology/approach – Technologies from embedded passives (EP) and photolithographic high‐density interconnect are integrated into a traditional PWB platform to enable multifunctional electrochemical sensors for on‐chip detection of biological assays.Findings – PWB materials and processes can be applied to develop microelectromechanical systems (MEMS) and microfluidic systems. On‐chip heaters using EP have been demonstrated with excellent accuracy. The on‐chip heaters can be used for localized temperature control as well as heat air pumps. The integration of EP and microchannels is a promising approach to add functionalities to the PWB‐based microsystems.Research limitations/implications – Further integration of microchannels with the embedded heaters and electrochemical sensors will incr...